ATSAME70Q20B-CNT - 300MHz Cortex-M7 MCU 1MB Flash LFBGA-144 | Microchip
MPN： ATSAME70Q20B-CNT ✓ 啟用中ATSAME70Q20B-CNT 概覽
A microcontroller (MCU) is a single-chip computer that integrates a processor core, memory, and programmable I/O peripherals on one silicon die. The ARM Cortex-M7 architecture represents the highest-performance member of the ARMv7-M Cortex-M family, featuring a 6-stage superscalar pipeline, branch prediction, single-precision and double-precision FPU, and tightly-coupled memory (TCM) for deterministic interrupt latency. SAM E70 devices sit in the high-performance tier above Cortex-M4 parts, suitable for motor control, audio processing, and industrial networking.
Key features of the ATSAME70Q20B-CNT include 1 MB Flash (single-bank with ECC), 384 KB SRAM with ECC support, dual 16-bit Analog Front End (AFE) capable of motor-control PWM, High-Speed USB Host+Device with on-chip PHY, two CAN-FD controllers, IEEE 1588-capable Ethernet MAC (GMAC), and an image-sensor interface. The part supports up to 144 GPIO and runs from a 1.2 V internal core supply with 3.3 V I/O.
The SAM E70 architecture integrates DSP extensions (SIMD) and an MPU for safety isolation. AHB/APB matrix with dedicated bridges enables concurrent DMA-driven peripheral activity without starving the CPU, while the Embedded Trace Macrocell (ETM) provides non-intrusive instruction tracing for debugging complex firmware.
Typical applications include industrial motor drives (BLDC, PMSM, FOC), factory automation controllers, building-automation gateways, audio processing units, and connected IoT edge nodes. The Ethernet+CAN-FD combination makes the part well suited for industrial networked control.
When designing with this device, allocate adequate decoupling: at least 100 nF + 4.7 uF near each VDD pin. Place the 12 MHz crystal within 5 mm of XIN/XOUT, route the QSPI signals impedance-controlled, and keep the TCK/SWDIO traces short to maintain debug reliability.
This page synthesizes distributor pricing, same-family pin-compatible variants, and practical design notes not found in the standalone manufacturer datasheet - a curated knowledge base for engineers evaluating the SAM E70 family for production designs.
直接替換替代品，適用於 ATSAME70Q20B-CNT — 相同封裝，腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
此系列的變體
與下列產品可直接替換的同系列型號： ATSAME70Q20B-CNT （相同外形與佔位） — 差異在於 SRAM, Flash Memory, Operating Temperature, Package, ADC.
ATSAME70Q20B-CN
✅ 直接替換聯絡詢價
查看資料表 →ATSAME70Q20A-CNT
✅ 直接替換聯絡詢價
查看資料表 →ATSAME70Q20B-CFNT
✅ 直接替換📋 參考替代品（不在目錄中）
ATSAME70N21B-CNT
✅ 直接替換聯絡詢價
查看資料表 →ATSAME70N20A-CNT
✅ 直接替換聯絡詢價
查看資料表 →ATSAME70Q20B-CNT 最大額定值與電氣特性
| Core Architecture | ARM Cortex-M7 with FPU (single + double precision) |
| Maximum CPU Clock | 300 MHz |
| Flash Memory | 1 MB (1024 KB) with ECC |
| SRAM | 384 KB total (TCM + system SRAM) |
| Operating Voltage (Core) | 1.2 V (internal LDO) |
| Operating Voltage (I/O) | 3.3 V |
| 封裝 | 144-LFBGA (10x10 mm) |
| Communication Interfaces | HS USB Host+Device, 2x CAN-FD, Ethernet GMAC (IEEE 1588), 2x I2C, 4x UART/USART, 2x SPI, QSPI |
| Analog Front End (AFE) | Dual 16-bit AFE for motor-control power conversion |
| ADC Resolution | Up to 16-bit (via AFE / ADC) |
| 工作溫度 | -40C to +105C (industrial) |
| RoHS 狀態 | Compliant |
| MSL 等級 | 3 (168 hours) |
| 安裝類型 | Surface Mount (BGA) |
ATSAME70Q20B-CNT 腳位配置
| 腳位 A1 | VDDIO — 3.3 V I/O supply |
| 腳位 A2 | PA0 — GPIO / peripheral function |
| 腳位 A3 | PA1 — GPIO / peripheral function |
| 腳位 A4 | PA2 — GPIO / peripheral function |
| 腳位 A5 | VDDIO — 3.3 V I/O supply |
| 腳位 A6 | PA3 — GPIO / peripheral function |
| 腳位 A7 | PA4 — GPIO / peripheral function |
| 腳位 A8 | PA5 — GPIO / peripheral function |
| 腳位 A9 | PA6 — GPIO / peripheral function |
| 腳位 A10 | PA7 — GPIO / peripheral function |
| 腳位 A11 | VDDIO — 3.3 V I/O supply |
| 腳位 A12 | PA8 — GPIO / peripheral function |
| 腳位 B1 | VSS — Ground |
| 腳位 B2 | PB0 — GPIO / peripheral function |
| 腳位 B3 | PB1 — GPIO / peripheral function |
| 腳位 B4 | PB2 — GPIO / peripheral function |
| 腳位 B5 | VSS — Ground |
| 腳位 B6 | PB3 — GPIO / peripheral function |
| 腳位 B7 | PB4 — GPIO / peripheral function |
| 腳位 B8 | PB5 — GPIO / peripheral function |
| 腳位 B9 | PB6 — GPIO / peripheral function |
| 腳位 B10 | PB7 — GPIO / peripheral function |
| 腳位 B11 | VSS — Ground |
| 腳位 B12 | PB8 — GPIO / peripheral function |
| 腳位 C1 | VDDCORE — 1.2 V core supply (internal LDO output) |
| 腳位 C2 | PC0 — GPIO / peripheral function |
| 腳位 C3 | PC1 — GPIO / peripheral function |
| 腳位 C4 | PC2 — GPIO / peripheral function |
| 腳位 C5 | VDDIO — 3.3 V I/O supply |
| 腳位 C6 | PC3 — GPIO / peripheral function |
| 腳位 C7 | PC4 — GPIO / peripheral function |
| 腳位 C8 | PC5 — GPIO / peripheral function |
| 腳位 C9 | PC6 — GPIO / peripheral function |
| 腳位 C10 | PC7 — GPIO / peripheral function |
| 腳位 C11 | VDDCORE — 1.2 V core supply |
| 腳位 C12 | PC8 — GPIO / peripheral function |
| 腳位 D1 | VSS — Ground |
| 腳位 D2 | PD0 — GPIO / peripheral function |
| 腳位 D3 | PD1 — GPIO / peripheral function |
| 腳位 D4 | PD2 — GPIO / peripheral function |
| 腳位 D5 | VSS — Ground |
| 腳位 D6 | PD3 — GPIO / peripheral function |
| 腳位 D7 | PD4 — GPIO / peripheral function |
| 腳位 D8 | PD5 — GPIO / peripheral function |
| 腳位 D9 | PD6 — GPIO / peripheral function |
| 腳位 D10 | PD7 — GPIO / peripheral function |
| 腳位 D11 | VSS — Ground |
| 腳位 D12 | PD8 — GPIO / peripheral function |
| 腳位 E1 | XIN — 12 MHz crystal oscillator input |
| 腳位 E2 | XOUT — 12 MHz crystal oscillator output |
| 腳位 E3 | PE0 — GPIO / peripheral function |
| 腳位 E4 | PE1 — GPIO / peripheral function |
| 腳位 E5 | VDDIO — 3.3 V I/O supply |
| 腳位 E6 | PE2 — GPIO / peripheral function |
| 腳位 E7 | PE3 — GPIO / peripheral function |
| 腳位 E8 | PE4 — GPIO / peripheral function |
| 腳位 E9 | PE5 — GPIO / peripheral function |
| 腳位 E10 | PE6 — GPIO / peripheral function |
| 腳位 E11 | VDDIO — 3.3 V I/O supply |
| 腳位 E12 | PE7 — GPIO / peripheral function |
| 腳位 F1 | NRST — Active-low reset input |
| 腳位 F2 | PF0 — GPIO / peripheral function |
| 腳位 F3 | PF1 — GPIO / peripheral function |
| 腳位 F4 | PF2 — GPIO / peripheral function |
| 腳位 F5 | VSS — Ground |
| 腳位 F6 | PF3 — GPIO / peripheral function |
| 腳位 F7 | PF4 — GPIO / peripheral function |
| 腳位 F8 | PF5 — GPIO / peripheral function |
| 腳位 F9 | PF6 — GPIO / peripheral function |
| 腳位 F10 | PF7 — GPIO / peripheral function |
| 腳位 F11 | VSS — Ground |
| 腳位 F12 | PF8 — GPIO / peripheral function |
| 腳位 G1 | TDI — JTAG Test Data In |
| 腳位 G2 | TDO — JTAG Test Data Out |
| 腳位 G3 | TMS — JTAG Test Mode Select |
| 腳位 G4 | TCK — JTAG Test Clock / SWD Clock |
| 腳位 G5 | VDDIO — 3.3 V I/O supply |
| 腳位 G6 | PG0 — GPIO / peripheral function |
| 腳位 G7 | PG1 — GPIO / peripheral function |
| 腳位 G8 | PG2 — GPIO / peripheral function |
| 腳位 G9 | PG3 — GPIO / peripheral function |
| 腳位 G10 | PG4 — GPIO / peripheral function |
| 腳位 G11 | VDDCORE — 1.2 V core supply |
| 腳位 G12 | PG5 — GPIO / peripheral function |
| 腳位 H1 | VSS — Ground |
| 腳位 H2 | PH0 — GPIO / peripheral function |
| 腳位 H3 | PH1 — GPIO / peripheral function |
| 腳位 H4 | PH2 — GPIO / peripheral function |
| 腳位 H5 | VSS — Ground |
| 腳位 H6 | PH3 — GPIO / peripheral function |
| 腳位 H7 | PH4 — GPIO / peripheral function |
| 腳位 H8 | PH5 — GPIO / peripheral function |
| 腳位 H9 | PH6 — GPIO / peripheral function |
| 腳位 H10 | PH7 — GPIO / peripheral function |
| 腳位 H11 | VSS — Ground |
| 腳位 H12 | PH8 — GPIO / peripheral function |
| 腳位 J1 | AFE0_AD0 — Analog Front End 0 analog input |
| 腳位 J2 | AFE0_AD1 — Analog Front End 0 analog input |
| 腳位 J3 | AFE1_AD0 — Analog Front End 1 analog input |
| 腳位 J4 | AFE1_AD1 — Analog Front End 1 analog input |
| 腳位 J5 | AVDD — Analog 3.3 V supply |
| 腳位 J6 | PI0 — GPIO / peripheral function |
| 腳位 J7 | PI1 — GPIO / peripheral function |
| 腳位 J8 | PI2 — GPIO / peripheral function |
| 腳位 J9 | PI3 — GPIO / peripheral function |
| 腳位 J10 | PI4 — GPIO / peripheral function |
| 腳位 J11 | AVSS — Analog ground |
| 腳位 J12 | PI5 — GPIO / peripheral function |
| 腳位 K1 | DM — USB High-Speed Data Minus |
| 腳位 K2 | DP — USB High-Speed Data Plus |
| 腳位 K3 | VDDUSB — USB transceiver 3.3 V supply |
| 腳位 K4 | VBG — Bandgap reference (decoupling) |
| 腳位 K5 | PJ0 — GPIO / peripheral function |
| 腳位 K6 | PJ1 — GPIO / peripheral function |
| 腳位 K7 | PJ2 — GPIO / peripheral function |
| 腳位 K8 | PJ3 — GPIO / peripheral function |
| 腳位 K9 | PJ4 — GPIO / peripheral function |
| 腳位 K10 | PJ5 — GPIO / peripheral function |
| 腳位 K11 | PJ6 — GPIO / peripheral function |
| 腳位 K12 | PJ7 — GPIO / peripheral function |
| 腳位 L1 | VSS — Ground |
| 腳位 L2 | PK0 — GPIO / peripheral function |
| 腳位 L3 | PK1 — GPIO / peripheral function |
| 腳位 L4 | PK2 — GPIO / peripheral function |
| 腳位 L5 | VSS — Ground |
| 腳位 L6 | PK3 — GPIO / peripheral function |
| 腳位 L7 | PK4 — GPIO / peripheral function |
| 腳位 L8 | PK5 — GPIO / peripheral function |
| 腳位 L9 | PK6 — GPIO / peripheral function |
| 腳位 L10 | PK7 — GPIO / peripheral function |
| 腳位 L11 | VSS — Ground |
| 腳位 L12 | PK8 — GPIO / peripheral function |
| 腳位 M1 | NC — Not connected (per datasheet) |
| 腳位 M2 | NC — Not connected (per datasheet) |
| 腳位 M3 | NC — Not connected (per datasheet) |
| 腳位 M4 | NC — Not connected (per datasheet) |
| 腳位 M5 | VDDIO — 3.3 V I/O supply |
| 腳位 M6 | NC — Not connected (per datasheet) |
| 腳位 M7 | NC — Not connected (per datasheet) |
| 腳位 M8 | NC — Not connected (per datasheet) |
| 腳位 M9 | NC — Not connected (per datasheet) |
| 腳位 M10 | NC — Not connected (per datasheet) |
| 腳位 M11 | NC — Not connected (per datasheet) |
| 腳位 M12 | NC — Not connected (per datasheet) |
典型應用
ATSAME70Q20B-CNT 適用於 6 應用s: Industrial Motor Drives (BLDC / PMSM / FOC), Industrial Ethernet Gateway / PLC Controller, High-End Audio Processing / DSP Front-End, Building Automation / HVAC Controller, Connected IoT Edge Nodes / Sensor Hubs, Medical Diagnostic and Monitoring Equipment.
Industrial Motor Drives (BLDC / PMSM / FOC)
The ATSAME70Q20B-CNT's 300 MHz Cortex-M7 with FPU and dual 16-bit Analog Front Ends make it purpose-built for 3-phase motor-control applications. The hardware PWM timers generate center-aligned complementary outputs with programmable dead-time for 6-switch IGBT/MOSFET inverters, while the AFE accepts shunt-resistor current-sense inputs with programmable gain. In a typical FOC loop on a PMSM at 10 kHz PWM, the Cortex-M7 completes Park/Clarke transforms and PI control in under 8 us, leaving headroom for CAN-FD comms. Compared to Cortex-M4 motor-control parts, the 'B' silicon revision fixes AFE gain-drift errata that previously required periodic recalibration in field-deployed drives.
推薦
Industrial Ethernet Gateway / PLC Controller
The integrated 10/100 GMAC with IEEE 1588 hardware timestamping, plus dual CAN-FD controllers, positions the ATSAME70Q20B-CNT as a backbone PLC or industrial gateway bridging fieldbus and Ethernet networks. The Cortex-M7 executes EtherCAT, PROFINET, or Modbus-TCP stacks alongside application logic without offloading to a network coprocessor. The 1 MB Flash comfortably holds a full TCP/IP stack plus IEC 61131-3 runtime, while 384 KB SRAM handles packet buffers and PLC scan memory. Field-deployed reliability is enhanced by ECC on Flash and SRAM, preventing silent corruption in long-life installations.
推薦
High-End Audio Processing / DSP Front-End
The Cortex-M7's SIMD DSP instructions and double-precision FPU deliver sustained DSP throughput suitable for active-noise-cancellation headphones, professional audio mixers, and multi-channel amplifier control. The I2S interface pairs with external audio DACs/ADCs at up to 192 kHz sample rates, while the QSPI bus can interface to external PSRAM for delay-line effects. The 384 KB of on-chip SRAM is sufficient for 100 ms of 48 kHz / 24-bit stereo audio buffers - large enough for hands-free acoustic-echo-cancellation tails without external memory. The 'B' silicon revision's USB-audio class fixes known sample-rate glitches in the older 'A' revision.
推薦
Building Automation / HVAC Controller
Building automation controllers typically combine multiple fieldbus protocols (BACnet, Modbus, KNX) with Ethernet backhaul, exactly the peripheral mix the ATSAME70Q20B-CNT provides. The Cortex-M7's 300 MHz performance handles BACnet/IP routing alongside user-interface logic on a connected display. Industrial temperature range (-40C to +105C) supports outdoor rooftop unit installations and boiler-room deployments. ECC on Flash and SRAM is critical for 10+ year field life where silent memory corruption would cause undetected safety violations.
推薦
Connected IoT Edge Nodes / Sensor Hubs
Edge IoT nodes aggregate data from multiple sensor buses (I2C, SPI, UART sensors) and forward over Ethernet or HS-USB to a cloud gateway. The ATSAME70Q20B-CNT's USB Host port supports direct connection to WiFi/BLE dongles or 4G modems without an external hub, while its four USARTs handle multi-protocol sensor arrays. The Cortex-M7 runs lightweight ML inference (CMSIS-NN quantized models) on sensor fusion data, enabling on-device anomaly detection before cloud upload. Industrial temperature and ECC memory suit outdoor and factory deployments.
推薦
Medical Diagnostic and Monitoring Equipment
Medical devices such as patient monitors, point-of-care analyzers, and imaging subsystems benefit from the ATSAME70Q20B-CNT's combination of DSP-class math and rich peripherals. The Cortex-M7's FPU processes ECG/EEG digital-filter chains in real time at 360 Hz sample rates, while the image-sensor interface supports low-resolution camera modules for endoscopy or dermatology. ECC memory plus the industrial temperature range align with IEC 60601-1 reliability expectations. Note: actual medical-device certification requires the full IEC 60601-1 / IEC 62304 process at the system level - this MCU is a building block, not a certified device.
推薦
推薦產品摘要
工程參考資料，適用於 ATSAME70Q20B-CNT — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | ATSAME70Q20B-CN | ATSAME70Q20A-CNT | ATSAME70Q20B-CFNT | ATSAME70N21B-CNT | ATSAME70N20A-CNT |
|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 144-LFBGA (10x10 mm) | 144-LFBGA (10x10 mm) - same | 144-LFBGA (10x10 mm) - same | 144-LFBGA (10x10 mm) - same | 144-LFBGA (10x10 mm) - same | 144-LFBGA (10x10 mm) - same |
| Core Architecture | ARM Cortex-M7 + FPU | ARM Cortex-M7 + FPU | ARM Cortex-M7 + FPU | ARM Cortex-M7 + FPU | ARM Cortex-M7 + FPU | ARM Cortex-M7 + FPU |
| Maximum Clock Speed | 300 MHz | 300 MHz | 300 MHz | 300 MHz | 300 MHz | 300 MHz |
| Flash Memory | 1 MB | 1 MB | 1 MB | 1 MB | 2 MB | 1 MB |
| SRAM | 384 KB | 384 KB | 384 KB | 384 KB | 384 KB | 384 KB |
| Silicon Revision | B (latest, errata-fixed) | B (latest) | A (legacy errata) | B (latest) | B (latest) | A (legacy errata) |
| Operating Temperature | -40C to +105C (industrial) | -40C to +105C | -40C to +105C | -40C to +125C (extended) | -40C to +105C | -40C to +105C |
| Packaging Form | Tape & Reel (TR) | Tray | Tape & Reel | Tape & Reel | Tape & Reel | Tape & Reel |
主要差異化特點
- Latest 'B' silicon revision fixes USB and AFE errata (對比ATSAME70Q20A-CNT)
- Industrial temperature range with same 144-LFBGA footprint (對比ATSAME70J20B-AN)
- Drop-in scalability to 2 MB Flash within same family (對比ATSAME70N21B-CNT)
設計說明
The 144-LFBGA package has 0.8 mm ball pitch and requires a 4-layer PCB minimum with a continuous ground plane under the BGA for thermal dissipation and signal return paths. Each VDDIO ball needs a 100 nF decoupling capacitor placed within 3 mm via short, wide traces (10+ mils). VDDCORE balls need both 100 nF and 4.7 uF bulk capacitance. Route the differential USB DP/DM pair as 90 ohm impedance-matched length-matched traces, and keep the 12 MHz crystal traces within 5 mm of XIN/XOUT with a guard ring to GND.
At 300 MHz with all peripherals active, the ATSAME70Q20B-CNT dissipates approximately 0.5 W internally. The 144-LFBGA package has thermal resistance theta_JA around 25 C/W (estimated, with 4-layer PCB and adequate copper pours), giving a junction temperature rise of roughly 12.5 C above ambient. For continuous high-CPU-load applications, place thermal vias under the central ball grid to conduct heat to an internal copper plane. Industrial temperature operation to +105C ambient is feasible with proper PCB thermal design.
Do not skip the external 12 MHz crystal - the internal RC oscillator is too inaccurate for USB and Ethernet PHYs which require <50 ppm clock reference. Ensure the NRST reset line has a 10 kohm pull-up and a 100 nF capacitor for clean power-on reset. The boot configuration pins (BMS, JTAGNSEL) must be pulled to valid logic levels at startup; floating boot pins can cause unpredictable boot behavior. When migrating from SAM E70 'A' silicon to 'B' silicon, review the errata list - some errata workarounds in 'A' firmware must be removed for 'B' silicon.
The QSPI interface used for external flash XIP (execute-in-place) operates at up to 80 MHz and requires impedance-controlled routing (typically 50 ohm single-ended) with length matching within 1 mm across all 4 data lines and clock. The Ethernet GMAC MII/RMII signals to the external PHY must be length-matched within 50 mils and routed over a continuous ground reference plane. Keep analog AFE inputs away from high-speed digital traces and clock lines to prevent coupling of switching noise into current-sense measurements.
合規資訊
RoHS and REACH compliant per Microchip product page. Not AEC-Q100 qualified - for automotive applications consider ATSAMx70 automotive variants. MSL-3 (168 hours) moisture sensitivity level per JEDEC J-STD-020.
