IQE012N03LM5CGSCATMA1 - 30V 1.15mΩ OptiMOS 5 MOSFET | Infineon
MPN： IQE012N03LM5CGSCATMA1 ✓ 啟用中IQE012N03LM5CGSCATMA1 概覽
An N-channel power MOSFET is a voltage-controlled three-terminal switch in which a gate-source voltage (VGS) induces an inversion layer in the silicon channel, allowing current flow between drain and source. The OptiMOS 5 family is Infineon's fifth-generation 30V-300V trench MOSFET platform optimized for low RDS(on) × gate charge (Qg) figure-of-merit — a key indicator of switching and conduction efficiency. The Source-Down PQFN package flips the silicon die so that the source terminal (instead of the drain) faces the PCB, enabling direct PCB-side cooling and simpler paralleling.
Key features include a maximum RDS(on) of 1.15 mΩ at VGS = 10 V, a continuous ID of 34 A (Ta) / 224 A (Tc), a pulsed avalanche rating defined on the datasheet, and an operating junction range of -55 °C to +175 °C. The 3.3 × 3.3 mm Source-Down PQFN footprint reduces loop inductance in buck and half-bridge topologies, which lowers voltage overshoot during switching transitions. The part is fully RoHS compliant and qualified to JEDEC moisture sensitivity Level 1.
Typical applications include high-density DC-DC point-of-load converters in servers and telecom hardware, hot-swap and OR-ing circuits on 12 V rails, motor-drive half-bridges in e-mobility tools, and synchronous-rectifier stages in telecom rectifiers. The Source-Down package enables direct copper cooling on the bottom pad, a thermal pathway unavailable on conventional drain-down PQFN devices.
When designing with this part, prioritize a large top-side PCB thermal copper area over the Source pad and minimize the high-current source-loop area to reduce parasitic inductance. The dual-side cooled variant permits thermal vias that pull heat into inner copper planes, supporting high continuous current without external heatsinking.
直接替換替代品，適用於 IQE012N03LM5CGSCATMA1 — 相同封裝，腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
此系列的變體
與下列產品可直接替換的同系列型號： IQE012N03LM5CGSCATMA1 （相同外形與佔位） — 差異在於 Package, Technology, Operating Temperature Range, Drain-Source Voltage (VDS), Gate Threshold Voltage (VGS(th)).
IQE020N04LM6CGATMA1
✅ 直接替換聯絡詢價
查看資料表 →IQE036N08NM6CGSCATMA1
✅ 直接替換聯絡詢價
查看資料表 →ISC015N06NM5LF2ATMA1
✅ 直接替換聯絡詢價
查看資料表 →ISZ019N03L5SATMA1
✅ 直接替換聯絡詢價
查看資料表 →BSC009NE2LS5IATMA1
✅ 直接替換聯絡詢價
查看資料表 →IQE012N03LM5CGSCATMA1 最大額定值與電氣特性
| FET Type | N-Channel |
| Technology | OptiMOS 5 (trench MOSFET) |
| Drain-Source Voltage (VDS) | 30 V |
| Continuous Drain Current (ID) @ Ta | 34 A |
| Continuous Drain Current (ID) @ Tc | 224 A |
| Maximum RDS(on) @ VGS=10V | 1.15 mΩ |
| Power Dissipation (Ta) | 2.5 W |
| Power Dissipation (Tc) | 107 W |
| Gate Threshold Voltage (VGS(th)) | 2 V (typ, per Merlin listing) |
| 封裝 | PG-WHTFN-9-1 (PQFN 3.3 × 3.3 mm Source-Down dual-side cooled) |
| 安裝類型 | Surface Mount |
| 工作接面溫度 | -55 °C to +175 °C |
| MSL 等級 | 1 (per JEDEC J-STD-020, floor life unlimited) |
| RoHS 狀態 | Compliant |
| Lead-Free | Yes |
IQE012N03LM5CGSCATMA1 腳位配置
| 腳位 1 | Drain — Drain terminal (lead-frame top side) |
| 腳位 2 | Gate — Gate terminal (Kelvin-source recommended for high di/dt) |
| 腳位 3 | Source (Sense) — Kelvin source-sense pin for gate-drive return |
| 腳位 4 | Source — Source terminal (also exposed bottom pad) |
| 腳位 5 | Source — Source terminal (also exposed bottom pad) |
| 腳位 6 | Source — Source terminal (also exposed bottom pad) |
| 腳位 7 | Source — Source terminal (also exposed bottom pad) |
| 腳位 8 | Source — Source terminal (also exposed bottom pad) |
| 腳位 9 | Source — Source terminal (also exposed bottom pad) |
安全工作區 — DC, TC=25°C
典型應用
IQE012N03LM5CGSCATMA1 適用於 6 應用s: High-Density 12 V Point-of-Load Converters, 12 V Hot-Swap and OR-ing Controllers, Synchronous Rectification in Telecom Rectifiers, E-Mobility and Battery-Powered Motor Drive Half-Bridges, USB-PD Power Bank and Battery Management Output Stages, Automotive ECU Load Switching.
High-Density 12 V Point-of-Load Converters
The IQE012N03LM5CGSCATMA1 fits 12 V point-of-load buck converters in server and telecom hardware where PCB area is constrained. Its 1.15 mΩ maximum RDS(on) at VGS = 10 V minimizes high-side and low-side conduction loss: at 30 A continuous load the device dissipates only ~1 W, well within the 107 W Tc rating. The Source-Down PQFN package reduces source-current loop inductance by 30-50% versus conventional drain-down packages, which lowers switching-node overshoot and ringing in 500 kHz - 1 MHz buck topologies. Compared to a typical 30 V parts at ~3 mΩ, this part halves conduction loss.
推薦
12 V Hot-Swap and OR-ing Controllers
Hot-swap and OR-ing circuits on 12 V server rails require MOSFETs that can sustain inrush currents while minimizing steady-state voltage drop. The IQE012N03LM5CGSCATMA1's 1.15 mΩ RDS(on) keeps voltage drop at 100 A to roughly 115 mV, reducing power dissipation to 11.5 W — manageable on the 3.3 × 3.3 mm Source-Down copper pad with adequate airflow. The 224 A continuous drain current (Tc) rating provides substantial margin during inrush events. The Source-Down package places the source lead at the PCB, simplifying Kelvin-source sensing for accurate current-limit trip thresholds in hot-swap controllers.
推薦
Synchronous Rectification in Telecom Rectifiers
In 48 V-to-12 V isolated telecom rectifier secondary-side synchronous rectification stages, the IQE012N03LM5CGSCATMA1's 30 V VDS, 1.15 mΩ RDS(on), and 224 A continuous current let it replace Schottky diodes for substantial efficiency gains. At 50 A output per phase, conduction loss is only ~3 W (compared to ~15 W for a Schottky), and the absence of reverse-recovery charge eliminates dead-time losses. The Source-Down PQFN package pulls heat directly into the PCB copper, supporting higher power density than through-hole TO-220 or DPAK alternatives.
推薦
E-Mobility and Battery-Powered Motor Drive Half-Bridges
Cordless power tools, e-bikes, and small e-mobility platforms use 24-36 V battery packs switched at 20-50 kHz. The IQE012N03LM5CGSCATMA1 is well-suited as a low-side synchronous switch in these half-bridges: 30 V VDS handles the bus with margin, the Source-Down package places source at PCB for low-inductance gate drive loops, and the 1.15 mΩ RDS(on) reduces I²R loss during high-current motor transients. Thermal performance is enhanced by the bottom-side copper pad, allowing direct chassis heat-sinking through thermal interface material.
推薦
USB-PD Power Bank and Battery Management Output Stages
USB-PD power banks and battery management systems require compact, efficient 5 V/9 V/15 V/20 V output stages that fit in pocket-sized enclosures. The IQE012N03LM5CGSCATMA1's 3.3 × 3.3 mm Source-Down PQFN footprint enables ultra-compact synchronous buck stages that deliver up to 60 W over USB-PD. The 1.15 mΩ RDS(on) maintains efficiency above 96% at 20 V/3 A output, and the Source-Down package enables bottom-side PCB copper cooling for sustained high-power operation in confined enclosures.
推薦
Automotive ECU Load Switching
Although not AEC-Q100 qualified, the IQE012N03LM5CGSCATMA1 can serve as a low-voltage load switch in non-safety automotive ECUs such as infotainment, lighting, and body control modules when 30 V VDS is sufficient. The -55 °C to +175 °C operating junction range covers automotive under-hood and cabin environments, and the Source-Down PQFN package withstands the vibration and thermal-cycling stresses of vehicle deployment. For AEC-Q100 qualified drop-in equivalents, the Infineon OptiMOS 5 -Q1 family (e.g., IQE012N03LM5CG-Q1) is the recommended upgrade path.
推薦
推薦產品摘要
工程參考資料，適用於 IQE012N03LM5CGSCATMA1 — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | IQE020N04LM6CGATMA1 | IQE036N08NM6CGSCATMA1 | ISC015N06NM5LF2ATMA1 | ISZ019N03L5SATMA1 | BSC009NE2LS5IATMA1 |
|---|---|---|---|---|---|---|
| Brand | Infineon Technologies | Infineon Technologies | Infineon Technologies | Infineon Technologies | Infineon Technologies | Infineon Technologies |
| Package | PQFN 3.3 × 3.3 mm Source-Down (PG-WHTFN-9-1) | PQFN 3.3 × 3.3 mm Source-Down (PG-WHTFN family) | PQFN 3.3 × 3.3 mm Source-Down (PG-WHTFN family) | PQFN 3.3 × 3.3 mm Source-Down (PG-WHTFN family) | PQFN 3.3 × 3.3 mm Source-Down (PG-WHTFN family) | PG-TDSON-8 (SuperSO2 5 × 6 mm) |
| VDS (Drain-Source Voltage) | 30 V | 40 V | 80 V | 60 V | 30 V | 25 V |
| Technology / Platform | OptiMOS 5 | OptiMOS 6 | OptiMOS 6 | OptiMOS 5 | OptiMOS 5 | OptiMOS 5 |
| RoHS Compliance | Yes | Yes | Yes | Yes | Yes | Yes |
主要差異化特點
- Lowest RDS(on) at 30 V in the 3.3 × 3.3 mm Source-Down PQFN family (對比ISZ019N03L5SATMA1)
- Source-Down dual-side cooling enables higher continuous current in smaller footprint (對比BSC009NE2LS5IATMA1 (SuperSO2 5×6))
- 30 V VDS optimized for 12 V bus systems with safety margin (對比IQE036N08NM6CGSCATMA1 (80 V VDS))
設計說明
Estimated: at PD = 5 W steady-state, the Source-Down 3.3 × 3.3 mm PQFN with 6 cm² top-side copper (per datasheet test PCB) yields approximately 25 °C junction temperature rise above ambient — well within the 150 °C derated operating envelope. For higher dissipation (>8 W) add thermal vias to inner copper planes; Source-Down allows heat extraction from both bottom pad and top copper. Do not rely on the drain-side for heat extraction in Source-Down packages, as the silicon die has its source terminal soldered to the PCB pad.
Minimize the high-current source loop by placing the input/output capacitors within 1 mm of the Source pad. Use a Kelvin-source connection (separate pin for gate-drive return) to isolate gate-drive current from the high-current source path. The Source-Down configuration naturally minimizes source-loop inductance because the source pad is the largest copper pour in the package — maximize PCB copper area over the Source pad for lowest RthJA.
Do not exceed the datasheet's 30 V VDS rating — in 24 V battery-fed systems, load-dump transients can exceed 40 V, requiring either a TVS clamp or a higher-voltage OptiMOS 5 part (e.g., 40 V IQE020N04LM6CGATMA1 or 60 V ISC015N06NM5LF2ATMA1). Verify VGS(th) minimum and gate-drive voltage: with VGS(th) at 2 V typical, 10 V gate drive is required for full enhancement; logic-level 4.5 V drive is insufficient.
合規資訊
RoHS compliant per Infineon product page. Not AEC-Q100 qualified — automotive designs should select the -Q1 variant of the OptiMOS 5 family. MSL Level 1 per JEDEC J-STD-020 (floor life unlimited). REACH compliance confirmed by Infineon product declaration.
