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PN7160B1HN-C100E - NFC Plug & Play Controller | NXP | HVQFN-40
The NXP PN7160B1HN-C100E is a high-performance NFC Plug and Play controller with integrated firmware and an NCI (NFC Controller Interface) interface, housed in a 40-pin HVQFN exposed-pad package. Operating at 13.56 MHz and supporting FeliCa, ISO 14443, ISO 15693, and MIFARE standards, the part includes Android, Linux, and RTOS drivers for accelerated system integration across consumer and industrial platforms. The SPI host interface operates on two supply rails: 1.65 V to 1.95 V (digital host I/O) and 3 V to 3.6 V (RF analog). The /C100E firmware suffix identifies the production-ready NCI binary supplied by NXP for out-of-box interoperability with the NFC Forum stack (NCI 2.0) on Android, Linux, and Windows hosts, removing driver bring-up cost and shortening OEM time-to-market. An NFC (Near Field Communication) controller is a mixed-signal IC that drives a contactless front-end (antenna + matching network) for short-range radio at 13.56 MHz, demodulating reader/writer, peer-to-peer, and card-emulation traffic while exposing a digital command interface to a host processor. In the power-management hierarchy the PN7160 sits between the application processor and the RF antenna; it is part of the broader family of secure connectivity, contactless-payment, and identification subsystems that includes PN5180 (raw front-end only) and PN532 (legacy peer-to-peer IC). Key features include integrated firmware (no host-side stack required for basic modes), automatic ECP (Enhanced Contactless Polling) detection, low-power card-detection polling, a hardware cryptographic accelerator, secure boot, firmware update, and on-chip LDO regulators for RF and host rails. The HVQFN-40 6 mm × 6 mm footprint with exposed thermal pad supports compact reader PCB layouts while delivering high transmit output power and ISO/IEC 14443-4 higher-layer support. Operating temperature spans -25 °C to +85 °C, making the part suitable for indoor and automotive-cabin applications. Typical applications include NFC tap-to-pay terminals, access control readers, IoT commissioning nodes, smart appliance pairing, and Bluetooth/Wi-Fi hand-off access points. When designing with the PN7160B1HN, careful impedance matching of the antenna loop and TVS protection on the antenna pads are critical to meet IEC 61000-4-2 ESD requirements. Keep the 40 MHz crystal reference and its load capacitors within a few millimeters of the XIN/XOUT pins to maintain RF output stability.
PN7161A1EV-C100Y - NFC Plug & Play Controller, Apple ECP, VFBGA-64 | NXP
The NXP Semiconductors PN7161A1EV-C100Y is an NFC Plug and Play Controller with integrated firmware and NCI (NFC Controller Interface), housed in a 64-ball VFBGA package. It is a 13.56 MHz RFID reader IC supporting FeliCa, ISO 14443, ISO 15693, MIFARE, and NFC Forum protocols via an I2C host interface, supplied from a 1.65V-1.95V or 3.0V-3.6V dual-rail input. The /C100Y variant adds Apple Enhanced Contactless Polling (ECP) support on top of the standard PN7161 feature set, targeting iPhone-based wallet and access-control use cases. An NFC controller is a mixed-signal IC that handles the physical-layer (RF front-end, modulation/demodulation) and low-level protocol stack of an ISO 14443/ISO 15693 reader system, offloading these real-time tasks from the host application processor. The host communicates via NCI (a standardized command set defined by the NFC Forum) over I2C, and the PN7161 family adds integrated firmware (Plug and Play) so designers do not need to develop or certify a contactless stack themselves. This places the PN7161 in the taxonomy: NFC controller -> contactless reader -> 13.56 MHz RF IC -> wireless/RFID IC -> semiconductor. Key features include integrated RF front-end, automatic ECP polling per Apple specification, support for all major contactless standards (ISO 14443 A/B, ISO 15693, FeliCa, MIFARE Classic/Ultralight/DESFire, NFC-DEP), NCI 2.0-compliant host interface, and low-power standby/Polling loop modes. The integrated DC-to-DC control supports direct battery supply in the 2.8V-5.5V range when paired with an NXP PCA941xA companion, simplifying power-tree design in portable terminals. Architecturally, the PN7161 integrates an ARM Cortex-M0 core for on-chip firmware execution, an AGC-controlled RF transmitter, multiple receiver inputs for better small-antenna performance, and a high-efficiency PMU. Compared with discrete reader ICs, the integrated firmware removes a major certification risk and reduces time-to-market for OEM payment, access, and pairing products. Typical applications include NFC payment terminals, point-of-sale (POS) readers, access control and identity readers, Bluetooth/NFC pairing, and Apple Wallet VAS/Value-Added Services. The wide host interface and OS-agnostic NCI make it compatible with Linux, Android, Windows, and RTOS-based hosts. Design consideration: select an external DC-DC such as the PCA9410A/PCA9411A/PCA9412A when VIN exceeds 5.5V or when higher output power is required. Without a DC-DC, the part operates from a clean 1.8V or 3.3V rail. This page synthesizes distributor pricing from DigiKey/Mouser/LCSC, drop-in alternative MPNs, and practical PCB/antenna design notes not collated in the manufacturer datasheet.
PN7161A1HN - NFC Plug & Play Controller with Apple ECP | NXP
The NXP Semiconductors PN7161A1HN is a 13.56 MHz NFC Plug and Play controller with integrated firmware, NCI 1.0 host interface, and hardware support for Apple Enhanced Contactless Polling (ECP), housed in a 40-pin HVQFN exposed-pad package (6x6 mm). It supports FeliCa, ISO 14443-A/B, ISO 15693, MIFARE Classic, MIFARE DESFire, and NXP NTAG/NFC Forum Type 1-5 tag protocols through its integrated transceiver, AFE, and on-chip matching network. An NFC controller is a mixed-signal semiconductor that combines a 13.56 MHz RF front-end (transmitter, receiver, and antenna matching) with a digital protocol stack. It sits below the application processor in a connected device's architecture: host SoC -> NCI/I2C -> NFC controller -> RF field -> contactless tag/reader/P2P peer. Within the broader taxonomy the PN7161A1HN belongs to: NFC controller -> contactless front-end IC -> wireless connectivity -> semiconductor. Offloading RF and protocol handling from the host reduces BOM count, firmware effort, and EMC risk for OEMs integrating contactless features. Key features include a single supply input (1.65-3.6 V with internal DC-DC supporting 3.0-5.5 V VBAT variants on related part numbers), up to 1.5 W output power delivered to the antenna load, ultra-low-power card-detection polling modes that draw roughly 100 uA in LPCD, integrated firmware loadable over I2C, and hardware cryptographic accelerators for MIFARE Classic Crypto1 and AES-128. An exposed thermal pad keeps theta_JA low enough for handheld and POS-terminal designs without an external heatsink. The PN7161A1HN embeds an Arm Cortex-M0 core that runs the NCI framing, AFI/anti-collision, and proprietary NXP extensions. The integrated TX LDO and current-limiting circuitry protect against antenna detuning and foreign-field events, while the embedded matching network simplifies PCB antenna design - external components are limited to a single EMC filter and the antenna coil itself. Typical applications include NFC tap-to-pay terminals, smartphone and tablet accessory sidecar PCBs, Bluetooth-pairing smart speakers, POS/PIN-pad readers, eBike and EV-charging authentication, and contactless firmware-update kiosks. Apple ECP enables a deterministic contactless handshake with iOS 17+ for wallet card selection and digital car-key workflows. When designing with this part, follow NXP application note AN12364 for the recommended antenna matching network and EMC filter component values. Keep the antenna trace loop area below 1 cm² away from the IC to minimize stray coupling, and provide a low-impedance ground plane under the exposed pad using at least nine thermal vias to the inner ground layer. This page consolidates distributor pricing, verified pin-compatible alternatives from the PN7160/PN7161 family, and practical layout notes not aggregated on the manufacturer datasheet.
PN7161A1HN-C100E - NFC Plug & Play Controller with Apple ECP | NXP
The NXP Semiconductors PN7161A1HN-C100E is an NFC (Near Field Communication) Plug and Play controller with integrated firmware, an NCI (NFC Controller Interface) host interface, and native support for Apple Enhanced Contactless Polling (ECP), housed in a 40-pin HVQFN (6 mm x 6 mm) exposed-pad module. It targets a 13.56 MHz RF carrier and supports FeliCa, ISO 14443 (Type A/B), ISO 15693, MIFARE, and NFC Forum tag types, while exposing an I2C host interface at addresses selectable between 1.65V-1.95V (host) and 3.0V-3.6V (RF/PMU) supply domains. An NFC controller is a mixed-signal IC combining an RF analog front-end, a digital protocol stack (NCI 1.0 / 2.0), and an embedded firmware state machine that offloads host-side polling, anti-collision, and tag/RFID reader transactions. The PN7161 belongs to the broader NXP NFC controller family (PN5180, PN5190, PN7220, PN7150, PN7160), positioned as a drop-in upgrade for designers migrating from PN7150/PN7159 and seeking lower host CPU overhead. It is a key subcategory of RFID Reader ICs inside RF Identification, which sits in the Wireless / Sensor Network technology stack alongside Wi-Fi and BLE combo parts. Key features include full NCI 1.0/2.0 host compliance, embedded firmware for autonomous polling, Apple ECP support, support for all NFC Forum modes (Reader/Writer, Peer-to-Peer, Card Emulation), an integrated LDO/DC-DC for the RF section, and a single I2C interface. The integrated firmware reduces host code size and minimizes the need for host CPU interrupts, accelerating Linux, Android, and RTOS porting on i.MX, LPC, and Kinetis MCU platforms. The 40-pin HVQFN exposed pad also provides a low-thermal-resistance path, supporting continuous RF field generation. Architecturally, the PN7161A1HN-C100E pairs an ARM Cortex-M0 core with NXP's proven analog demodulator IP, on-chip tuning capacitors, and direct battery connection support through the integrated VANT (antenna supply) booster. This reduces external BOM (no external LDO required) and simplifies PCB layout for POS terminals, access control readers, and IoT-NFC bridges. Apple ECP authorization (NDA-gated firmware variant) requires registration with Apple MFi to enable ECP features - the silicon supports it but the firmware unlock is a software/license step. Typical applications include payment terminals (POS), physical access control readers, NFC tag readers in printers/consumer electronics, automotive infotainment NFC pairing (AEC-Q100 subscription grade not in -C100E suffix), and IoT commissioning bridges. Designers choose it over PN7150 for lower BOM, lower host CPU load, and Apple ECP readiness, and over PN5180/PN5190 when a higher-level NCI interface is preferred over a register-level PHY. When designing with this part, ensure the PCB antenna matching network targets 13.56 MHz with a Q below 35 to meet ISO 14443 bandwidth, and route the exposed thermal pad with at least 9 thermal vias to a continuous ground pour. Because the I2C SDA/SCL lines require pull-ups per the NCI specification, populate them per the typical application schematic and verify the host MCU's I2C clock-stretching tolerance - NCI polling bursts can stretch the clock longer than naive I2C controllers tolerate.
PN7161A1HN-C100Y - NFC Plug & Play Controller | NXP | 40-VFQFN
The NXP Semiconductors PN7161A1HN-C100Y is an NFC Plug and Play controller with integrated firmware and NCI (NXP NFC Controller Interface), operating at 13.56 MHz and supporting FeliCa, ISO 14443, ISO 15693, and MIFARE contactless protocols in a 40-pin HVQFN (SOT1655-1) exposed-pad package. This PN7161 variant specifically adds support for Apple ECP (Enhanced Contactless Polling), enabling seamless integration with Apple devices. The device operates from dual supply rails of 1.65V to 1.95V (typically 1.8V) and 3.0V to 3.6V for the host interface and RF analog sections respectively. The integrated firmware eliminates the need for a host-resident NFC stack, dramatically reducing host code size and design-in complexity. Host communication is handled via I²C, supporting standard MCUs from NXP's LPC, Kinetis, and i.MX families as well as third-party controllers. Background: An NFC (Near Field Communication) controller is a specialized mixed-signal IC that manages the physical and protocol layers of 13.56 MHz contactless communication, including RF field generation, demodulation, modulation, anti-collision, and cryptographic authentication for tags/cards. NFC controllers sit within the broader hierarchy of RF identification ICs -> RFID reader/transponder ICs -> wireless connectivity -> semiconductor, providing the lowest-level hardware interface while higher software layers (NCI, NFC Forum, NDEF) handle application logic. Modern plug-and-play NFC controllers integrate the full firmware stack so the host processor only needs to issue high-level commands, making them functionally distinct from RFID reader chips that require an external stack. Key features include a high RF output power supporting typical NFC reader ranges, low standby current suitable for always-on applications, support for EMVCo and NFC Forum compliance, and a single 40-pin package that consolidates all functions to minimize external BOM. The exposed thermal pad enables efficient heat dissipation in compact designs. The C100Y variant is the Apple ECP-enabled firmware configuration shipped in production packaging quantities, while the base PN7160 supports the same hardware without Apple-ECP-specific code extensions. The integrated ARM Cortex-M0 core handles all on-chip processing, offloading real-time NFC protocol timing from the application processor. An on-chip LDO and DC-DC converter generate internal supply rails from a single external 3.3V feed, simplifying power-tree design. The device also includes EEPROM for firmware patches and configuration storage, so field updates do not require external memory components. Typical applications include NFC payment terminals, Bluetooth pairing via NFC, smart home commissioning, wireless charging authentication, access control readers, and OEM authentication tags. The Apple ECP support specifically targets iPhone-based tap-to-pair and tap-to-pay use cases. When designing with this controller, follow NXP's reference antenna design guidelines and ensure proper impedance matching for the matching network components to achieve the rated RF output power across all supported protocols.
PN7161B1EV - NFC Plug & Play Controller, 13.56MHz, VFBGA-64 | NXP
The NXP Semiconductors PN7161B1EV is a Near Field Communication (NFC) Plug and Play controller with integrated firmware and NCI host interface, supporting Apple ECP and housed in a 64-pin VFBGA package. It operates at the 13.56 MHz carrier frequency and is qualified for FeliCa, ISO 14443, ISO 15693, and MIFARE protocols, enabling broad interoperability with contactless cards, tags, and peer devices. What is an NFC controller? An NFC controller is a contactless front-end IC that handles the RF physical layer, protocol stack, and (in many NXP devices) the host-side NCI interface for an application processor. NFC controllers belong to the broader category of RFID reader/writer ICs, which sit within RF & wireless identification semiconductors. They typically integrate an RF front-end, a digital protocol engine, and a host communication interface (I2C, SPI, or NCI), allowing designers to add contactless functionality without writing low-level firmware from scratch. Key features of the PN7161B1EV include support for reader/writer, peer-to-peer, and card-emulation modes; integrated NCI 1.0 host interface over SPI; an on-chip RF front-end with Tx driver and Rx chain; and an integrated firmware stack. The device supports a low-power mode to meet mobile and IoT power budgets, and includes Apple Enhanced Contactless Polling (ECP) support for iOS interoperability. The PN7161B1EV uses a 64-ball VFBGA package optimized for compact PCB layouts typical of smartphones, wearables, and IoT terminals. Internally, it combines an ARM Cortex-M0 core for firmware execution with a dedicated RF front-end, allowing the host processor to offload all NFC stack processing. This architecture reduces host CPU load and simplifies software integration for Android, Linux, and RTOS environments. Typical applications include NFC payment terminals, mobile point-of-sale (mPOS) devices, Bluetooth-pairing tags, automotive digital key systems, eGovernment / eID readers, and IoT provisioning via NFC. The combination of NCI host interface and integrated firmware makes it especially attractive for platforms running Android or Linux where Linux NCI drivers are already available. When designing with the PN7161B1EV, note that it requires an external matching network and antenna tuned to 13.56 MHz; bypass capacitors on VCC are mandatory and the exposed pad must be soldered to the ground plane for thermal dissipation and RF return. Avoid routing digital signal traces beneath the antenna area to minimize detuning. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the NXP datasheet.
PN7161B1EV-C100Y - NFC Plug & Play Controller, Apple ECP, VFBGA-64 | NXP
The NXP Semiconductors PN7161B1EV-C100Y is a near-field communication (NFC) plug-and-play controller IC that integrates all NFC functionality on-chip, including RF front-end, NCI 1.3-compliant host interface, and embedded firmware. Operating at the 13.56 MHz carrier frequency, it supports FeliCa, ISO 14443, ISO 15693, MIFARE Classic, MIFARE DESFire, and NFC-Forum tag types. The device is supplied in a 64-ball VFBGA package measuring 5.5 mm x 5.5 mm x 0.8 mm. The C100Y firmware build adds Apple's Enhanced Contactless Polling (ECP) support on top of the standard PN7161 NCI feature set. An NFC controller is a radio-frequency identification transceiver that implements the ISO/IEC 14443 and ISO/IEC 15693 contactless protocols, allowing a host processor to read/write NFC tags and emulate contactless smart cards. NFC controllers sit below the operating system NFC abstraction layer, above the antenna matching network, and within the broader category of RFID reader ICs and short-range wireless transceivers. By integrating the analog front end, protocol stack, and firmware, parts such as the PN7161 remove the need for the application MCU to handle millisecond-level RF timing. The PN7161B1 supports automatic RF output power configuration up to +15 dBm into a 50 ohm load, a host-controlled SPI interface (PN7160 also offers I2C), and integrated dynamic power control (DPC) that adjusts output power to compensate for detuned antennas. Supply domains include 1.65 V to 1.95 V (host IO) and 3.0 V to 3.6 V (RF analog), with deep-sleep current below 15 uA. The C100Y firmware extends standard PN7161 NCI polling by enabling Apple ECP, which speeds up iPhone reader interactions for payment, loyalty, and identity applications. This part fits best in point-of-sale terminals, mobile point-of-sale (mPOS) dongles, NFC-Forum peer-to-peer accessories, and smart-home commissioning hubs that must interoperate with iOS devices in addition to Android. The VFBGA-64 footprint is a low-profile package suited to space-constrained products, and the integrated firmware drastically shortens host-side development cycles compared to discrete RF front-ends. Designers do not need prior RF expertise - NXP provides reference antenna matching values and pre-tuned firmware images. Key design trade-offs include the 0.8 mm BGA pitch, which requires assembly with ENIG or ENEPIG surface finish and controlled-impedance routing, plus a separate reset logic to enter download mode for firmware updates. Because the PN7161B1 uses SPI while the PN7160 supports both SPI and I2C, verify host MCU peripherals before substituting. For Apple-only ECP readers the C100Y variant is required; the C100 base firmware omits ECP and is therefore not iOS-optimal.
PN7161B1HN-C100E - NFC Controller with NCI, Apple ECP | NXP
The NXP Semiconductors PN7161B1HN-C100E is an EMV L1 compliant Near Field Communication (NFC) controller with an NCI (NFC Controller Interface) and integrated firmware, supporting 13.56 MHz contactless operation in a 40-pin HVQFN (6x6 mm) exposed-pad package. It operates from 1.65V to 1.95V and 3.0V to 3.6V supply rails, interfaces to the host through SPI, and supports FeliCa, ISO 14443, ISO 15693, MIFARE, and NFC Forum applications with Apple Enhanced Contactless Polling (ECP) authorization. The PN7161B1HN-C100E is the production version designated by the /C100E firmware bundle, optimized for Apple Wallet and EMV L1 use cases. An NFC controller (also called an NFC front-end or NCI controller) is a semiconductor that sits between a host processor and an NFC antenna, handling the 13.56 MHz RF link, ISO protocol stack, and cryptography offload so that the application processor can speak to the reader through a standardized high-level interface (NCI). Within the system hierarchy, it sits at the interconnect layer: NFC controller -> NFC front-end -> wireless connectivity IC -> semiconductor. It enables contactless payments, ticketing, access control, and peer-to-peer data exchange without burdening the application MCU with real-time RF processing. Key features include full EMV L1 compliance, NCI 1.0 host interface, integrated firmware (PN7161B1HN/C100E bundle), Apple ECP support, automatic ECP handling for Apple Pay, automatic antenna tuning via the integrated VDD_TX driver, low-power standby mode with polling, and on-chip EMC filtering. The device supports both 1.8V and 3.3V host logic via separate supply pins (VDD_IO and VDD), simplifying integration with modern application processors without level shifters. The PN7161B1HN/C100E firmware adds turnkey EMV payment stack handling and Apple Wallet ECP behavior, dramatically reducing host-side software development. Compared to the PN7160, the PN7161 adds Apple ECP support after formal authorization. Compared to discrete RF front-ends (e.g. discrete NFC reader ICs without integrated firmware), the PN7161B1HN-C100E delivers a smaller BOM, simpler EMC compliance path, and faster time to market for payment terminals. Typical applications include point-of-sale (POS) terminals, mobile payment readers, access control readers, transit ticketing terminals, NFC-enabled IoT hubs, and Apple Pay-compatible accessory products. In each case the controller integrates seamlessly into designs that already have a host MCU running Linux, Android, or an RTOS, with NCI driver support available from NXP and mainline Android. When designing with this part, follow NXP application note AN11892 for the antenna matching network and reference the OM27160 evaluation board for the certified antenna design. Pay attention to the exposed-pad (EP) PCB land pattern for thermal dissipation and RF grounding, and verify that the host NCI driver is matched to the firmware bundle revision indicated on the top marking. This page synthesizes distributor pricing, drop-in pin-compatible NXP family alternatives, and practical design notes not found in the manufacturer datasheet.
PN7642 - NFC Reader IC with Cortex-M33 MCU & Security | NXP
The NXP Semiconductors PN7642 is a highly integrated NFC open controller that combines a high-performance NFC reader, a low-power Arm Cortex-M33 microcontroller with 180 kB of programmable flash memory, and a Common Criteria EAL6+ certified secure element, supplied in a BGA form factor (PN7642EV orderable variants). An NFC reader controller is a single-chip integration of an RF analog front end (for 13.56 MHz contactless communication), protocol firmware, and a host-processing MCU. Within the system hierarchy, it belongs to the RF & Wireless > NFC/RFID reader family: antenna driver -> NFC frontend -> NFC controller with MCU (PN7462, PN7642). By merging reader, MCU, and secure element, the PN7642 replaces the need for an extra discrete MCU and a dedicated Secure Element in the bill of materials, reducing board area and BOM cost in payment and access-control designs. Key features include the integrated Common Criteria EAL6+ certified secure element, EMVCo certification for contactless payments, support for ISO 14443 (Type A and Type B) and NFC Forum protocols, and the Arm Cortex-M33 core with 180 kB of user-programmable flash. GPIO resources include multi-function pins such as GPIO2 (PWM2 capability) and GPIO3 (PWM3 capability); when ULPCD (Ultra-Low-Power Card Detection) is used, GPIO3 must be dedicated to aborting the ULPCD function and cannot be allocated to other roles. Technically, the PN7642 pairs a high-performance NFC frontend with a customizable MCU subsystem, enabling customer firmware to implement application logic, key management, and cryptographic operations on-chip. The security toolbox addresses secure key storage, a primary requirement for payment terminals and secure access readers, and the part is supplied in a compact BGA package suitable for space-constrained embedded designs. Typical applications include EMVCo contactless payment terminals, secure access-control and identity readers, and NFC-enabled IoT devices that require both contactless connectivity and embedded security without external components. Design consideration: firmware architecture must account for pin multiplexing constraints such as GPIO3 contention with ULPCD, and designers should consult NXP design-in documents beyond the product data sheet, since detailed design-in information is distributed separately by NXP. This page synthesizes verified distributor pricing, drop-in alternative analysis, and practical design notes not found in the manufacturer datasheet.
PN7642EV/C100K - NFC Controller with Cortex-M33 MCU | NXP
The NXP Semiconductors PN7642EV/C100K is a high-performance NFC open controller that integrates an Arm Cortex-M33 microcontroller, a full NFC reader front end for 13.56 MHz contactless communication, and a hardware security subsystem in a single 64-ball VFBGA package. It operates from a 1.8 V to 3.5 V supply and supports ISO 14443-A, ISO 14443-3/4-B, ISO 15693, ISO 18092 (NFCIP-1), ISO 18000-3, MIFARE and FeliCa protocols, with host interfaces including I2C, SPI, UART and USB. An NFC controller is a specialized mixed-signal integrated circuit that modulates and demodulates 13.56 MHz RF signals and executes contactless protocol stacks. Within the system hierarchy, the PN7642 sits above discrete NFC front ends: by combining the analog NFC front end, a general-purpose MCU and a secure element on one die, it functions as a complete NFC reader system-on-chip within the connectivity layer of a terminal design. Key differentiating features include 180 kB of programmable flash memory (256 kB total memory per distributor listings), an integrated security toolbox optimized for secure key storage and cryptography, and low-power operation suited to battery-powered readers. The single-chip architecture removes the need for a separate host MCU and a discrete secure element, reducing bill-of-materials count and board area. Technically, the PN7642 combines NXP's proven NFC RF front end with an Arm Cortex-M33 CPU core, providing developer-customizable firmware on the C100 firmware version (01.00). GPIO pins with PWM capability (for example GPIO2/GPIO3 on balls E7 and D7) allow direct control of LEDs, buzzers and power switches. The datasheet also documents firmware variants C101 (02.00, pinless-download mode) and C102 (03.00) for field-upgradeable deployments. Typical applications include point-of-sale payment terminals, access-control readers, battery-powered smart locks, and industrial handheld readers. The security subsystem makes it particularly suited to payment and authentication use cases requiring cryptographic key protection. A key design consideration is the 64-ball VFBGA package: ball-grid mounting requires controlled reflow profiles and is not hand-solderable, so panel design and rework capability should be confirmed before layout. Antenna matching network design should follow the NXP PN7642 antenna design guidance for 13.56 MHz EMC performance. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.
QPK3000 - Fully Integrated UWB RTLS Module | Qorvo
The Qorvo QPK3000 is a fully integrated IR-UWB (impulse-radio ultra-wideband) RTLS tag module operating at 6.5 GHz to 8 GHz, with an integrated 2.4 GHz radio for Bluetooth Low Energy and/or IEEE 802.15.4-2020 connectivity, supplied from a 2.5 V to 3.6 V rail and housed in a 20 x 20 mm castellated-edge package with 1.5 mm pitch and two state-of-the-art integrated antennas. An RTLS (Real-Time Location System) tag module is a wireless device that transmits precisely timestamped UWB pulses, allowing infrastructure anchors to calculate position with centimeter-class accuracy - far beyond what Bluetooth RSSI or Wi-Fi positioning can achieve. Within the wireless hierarchy, UWB sits alongside BLE and IEEE 802.15.4 as a short-range PHY standard, but its wide bandwidth and narrow pulses give it unique ranging precision. The QPK3000 combines both radio domains on one certified module. Key features include dual-radio operation (UWB plus BLE/802.15.4 at 2.4 GHz), guaranteed interoperability with UWB-enabled enterprise infrastructure including leading Access Points, support for the Omlox standard and coming compatibility with Cisco Spaces, and a flexible Zephyr-based software environment for custom RTLS development. The integrated antennas eliminate RF layout work. Architecturally, the module is compliant with IEEE 802.15.4-2015 (PHY and MAC layers) and IEEE 802.15.4z-2020, enabling Enhanced Ranging Frame formats. Two UARTs are provided for interfacing with peripheral devices and for terminal logging during software development, which shortens bring-up time considerably. Typical applications include asset-tracking tags for smart factories, indoor navigation badges, and drop-in UWB RTLS addition to existing products without PCB redesign. The 2.5 V to 3.6 V supply range suits direct lithium-cell or regulated 3.3 V designs. Design consideration: because the module is certified and pre-integrated, the main engineering effort shifts to firmware (Zephyr RTOS) and mechanical placement of the two integrated antennas away from metal enclosures. This page synthesizes distributor data, ecosystem compatibility details, and practical integration guidance not found in a single manufacturer datasheet.
QPM1002 - 8.5-10.5GHz GaN X-Band T/R FEM 3W | Qorvo
The Qorvo QPM1002 is a Gallium Nitride (GaN) MMIC front-end module (FEM) for X-Band radar applications covering 8.5 GHz to 10.5 GHz, integrating a T/R switch, a low-noise amplifier, and a power amplifier in a 5 x 5 mm QFN surface-mount package with over-mold encapsulant. A front-end module (FEM) is a highly integrated RF building block that sits between the antenna and the transceiver in a radar system. In an X-Band phased array radar, the FEM performs three critical functions: amplifying weak received echoes (LNA path), amplifying transmitted pulses (PA path), and switching between the two (T/R switch). Integrating all three on a single GaN-on-SiC die reduces board area, assembly variation, and lattice-spacing constraints compared to discrete multi-chip solutions. According to the Qorvo datasheet, the receive path delivers 25 dB of small-signal gain with a low noise figure of 2.2 dB, maximizing radar detection range against small targets. The transmit path provides 33 dB of small-signal gain and can deliver 3 W of saturated output power with a power-added efficiency (PAE) of 32%. The ANT port tolerates up to 2 W of input power, eliminating the need for an external limiter diode and its associated insertion loss. The module is fabricated on Qorvo's QGaN25 0.25 um GaN-on-SiC process. The high thermal conductivity die-attach, combined with the over-molded QFN package, allows reliable operation in high-temperature environments typical of airborne and ground-based phased array antennas. Typical applications include X-Band phased array radar transmit/receive (T/R) channels, marine and weather radar, and airborne surveillance systems where compact size and high power density are mandatory. Design consideration: the high power density of GaN requires a well-designed thermal path; the exposed package paddle must be soldered to a low-thermal-resistance via array in the PCB. This page synthesizes distributor sourcing data, drop-in alternative guidance, and practical design notes not found in the manufacturer datasheet.
QPM1002SR - X-Band 3W GaN T/R FEM 8.5-10.5GHz | Qorvo
The Qorvo QPM1002SR is an 8.5-10.5 GHz GaN MMIC front-end module (FEM) integrating a T/R switch, low-noise amplifier, and power amplifier in a 5 x 5 mm over-molded QFN surface-mount package. The receive path provides 25 dB of gain with a 2.2 dB noise figure, while the transmit path delivers 33 dB small-signal gain, 3 W of saturated output power, and 32% power-added efficiency (PAE). A transmit/receive module is a bidirectional RF front end that shares a single antenna between a transmitter and a receiver using a T/R switch. In the system hierarchy, it sits above individual MMIC amplifiers, combining switching, LNA, and PA functions into one module, and is a core building block of power management for radar front ends. Modules like the QPM1002 reduce component count, footprint, and assembly tolerance compared to discrete chains. Key differentiating features include the integration of three functions (switch, LNA, PA) on a single die-level module, which minimizes interconnect losses and lattice pitch. According to Qorvo, the part is fabricated on the QGaN25 0.25 um GaN-on-SiC process, whose wide bandgap supports high power density and ruggedness. The over-mold encapsulant combined with a proprietary high-thermal-conductivity die-attach allows operation in elevated-temperature environments, and the compact 5 x 5 mm footprint supports the tight lattice spacing required by X-Band phased array radar. Technically, the GaN-on-SiC construction offers superior thermal conductivity relative to GaAs, enabling higher channel temperatures to be tolerated and higher power density per millimeter of gate periphery. The 0.25 um gate length of the QGaN25 process supports X-Band frequencies with good efficiency, and the integrated T/R switch eliminates the insertion loss of an off-module circulator or switch in compact arrays. Typical applications include X-Band phased array radar transmit/receive channels, military and commercial radar front ends, and airborne or ground-based surveillance radar systems. In phased arrays, the module's small size directly determines achievable element pitch at 8.5-10.5 GHz. When designing with this module, thermal management is the primary consideration: the GaN die dissipates substantial heat at 3 W RF output, so the PCB ground vias and heat-spreading copper must be designed for the high-thermal-conductivity die-attach to work as intended. Bias sequencing and switch control timing should follow the manufacturer datasheet. This page synthesizes distributor availability, verified datasheet parameters, and practical design guidance for the QPM1002SR not consolidated in the manufacturer datasheet.
Quectel BC660K-GL-TE-B LTE Cat NB2 Module | Quectel
The Quectel BC660K-GL-TE-B is a high-performance multi-band LTE Cat NB2 (NB-IoT) module with extremely low power consumption, delivered in a compact LCC surface-mount package measuring 17.7 mm x 15.8 mm x 2.0 mm and weighing 1.8 g. It supports 3GPP LTE Cat NB2 with a maximum downlink rate of 127 Kbps and a maximum uplink rate of 158.5 Kbps across an extensive band set: B1/2/3/4/5/8/12/13/17/18/19/20/25/28/66/70/85, enabling near-global NB-IoT deployment on a single SKU. An NB-IoT (Narrowband Internet of Things) module is a low-power wide-area (LPWA) cellular transceiver defined by the 3GPP LTE Cat NB2 standard. Within the wireless communications hierarchy, it sits inside the LPWA family of cellular IoT technologies, alongside LTE Cat M1, and is optimized for applications that send small payloads infrequently while running for years on a single battery. Key features of the BC660K-GL-TE-B include the ultra-compact 17.7 mm x 15.8 mm x 2.0 mm LCC footprint for space-constrained designs, an extended operating temperature range of -40C to +85C for rugged environments, surface-mount technology (SMT) assembly suitable for high-volume automated production, and multi-band coverage for global carriers. The module's extremely low power consumption makes multi-year battery operation realistic for metering-grade devices. Technically, the BC660K-GL adopts LCC castellated-edge packaging, which provides reliable solder joints and resistance to vibration and shock, making it ideal for durable and rugged designs. Quectel documents a compatible-design migration path between the BC66/BC66-NA and BC660K-GL, allowing designers to move between NB-IoT generations on the same PCB concept with a documented compatible design manual. AT command control is shared with the BC950K-GL family via the common BC660K-GL/BC950K-GL AT Commands Manual. Typical applications include smart metering (water, gas, electricity), smart parking and bike sharing, smart city infrastructure, security and alarm systems, and asset tracking, where narrow bandwidth, deep coverage, and multi-year battery life outweigh raw throughput. Design consideration: because NB-IoT payloads are small and latency-tolerant, budget antenna selection and RF layout carefully per the Quectel BC660K-GL Reference Design and Hardware Design documents; RF matching network deviations from the reference design are the most common cause of failed carrier certification. This page synthesizes verified distributor data, the Quectel compatible-design migration path, and practical design guidance not consolidated on the manufacturer product page alone.
RAK2247 - SX1301 LoRa Concentrator mPCIe Module | RAKwireless
The RAKwireless RAK2247 is a mini-PCIe LoRa gateway concentrator module based on the Semtech SX1301 baseband processor, delivering up to 10 programmable parallel demodulation paths across 2 SX125x Tx/Rx front-end stages. Housed in a 50.95 mm × 30 mm PCI Express Mini Card form factor, the module supports US915 (and other regional ISM bands via SKU variants) and targets smart-metering fixed networks plus IoT deployments up to 500 nodes per km² in moderately interfered environments. A LoRa concentrator is a gateway-side baseband processor that turns a host embedded platform (any board exposing a free mPCIe slot) into a multi-channel LoRaWAN gateway. Within the broader wireless taxonomy the part sits at: LoRa concentrator -> LPWAN gateway module -> RF module -> IoT gateway hardware. By exploiting Semtech's chirp-spread-spectrum demodulation in parallel on 8 (or 10) channels, it allows simultaneous reception of many LoRa packets on different spreading factors and frequencies, which is the fundamental capability that distinguishes an 8-channel gateway from a single-channel peer device. Key features include: SPI or USB host interface (SKU dependent), integrated GPS receiver input for packet timestamping, +27 dBm maximum TX power through the on-board power amplifier, and a Listen-Before-Talk preamble scanner. Operating from a 3.3 V supply drawn through the mPCIe edge connector, the RAK2247 simplifies gateway prototyping because the host only needs to load the Semtech HAL / sx1301_hal library and forward IP packets to a LoRaWAN network server such as ChirpStack or TTN. Technically the SX1301 sits between two SX1257 (or SX1255) transceivers feeding an IF chain into the digital demodulation block; the chip contains 8 LoRa demodulation paths plus one FSK/GFSK path and one narrow-band channel. The host CPU offloads packet CRC, de-whitening and address filtering to the SX1301 firmware, dramatically reducing the gateway CPU load compared to a soft-modem approach. RAK2247 is a complete subsystem: the SX1301 plus front-ends, TCXO, LNA, PA, balun, GPS connector and IPEX antenna connectors are all integrated on the single mPCIe board. Typical applications include LoRaWAN indoor gateway prototypes, smart-metering aggregation gateways, industrial IoT bridges, and Helium light-hotspot builds. The 10-path parallel demodulation is the dominant selection criterion when a deployment expects concurrent traffic from many SF7–SF12 nodes. When designing with RAK2247, ensure the host carrier board routes USB D+/D- or SPI pins (CS, CLK, MOSI, MISO, IRQ, RESET) to a free mPCIe socket, supplies a clean 3.3 V at 500 mA, and provisions an IPEX antenna pigtail for the LoRa port and a separate IPEX for GPS. This page synthesizes distributor pricing, same-brand and cross-brand drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone.
RAK3172-8-SM-NI - LoRaWAN 868MHz Stamp Module, STM32WLE5, SMD | RAKwireless
The RAKwireless RAK3172-8-SM-NI is a compact, surface-mount LoRaWAN transceiver module based on the STMicroelectronics STM32WLE5CCU6 SoC, operating in the 864 MHz / 865 MHz / 868 MHz ISM bands with 2 V to 3.6 V supply, and supplied without an I-PEX antenna connector. It integrates an Arm Cortex-M4 MCU at 48 MHz with 256-Kbyte Flash and 64-Kbyte SRAM alongside a Semtech SX126x-compatible LoRa transceiver, delivering up to 15 km line-of-sight range at 5.22 mA receive current and 87 mA transmit current in a 15.5 x 15 mm SMD footprint. A LoRa module is a self-contained radio block that bundles an MCU, RF transceiver, matching network and crystal into a single reflow-solderable unit. LoRaWAN, the wider-area networking protocol layered on LoRa modulation, occupies the sub-GHz ISM spectrum and is the dominant low-power wide-area network (LPWAN) standard for battery-operated IoT deployments - a category that includes LoRa modules, LPWAN SoCs, RF transceivers, and wireless connectivity ICs. The RAK3172 sits at the lower end of this taxonomy, giving designers a pre-certified path to LoRaWAN Class A/B/C without exposing the SX126x register set or the STM32WLE5 radio peripherals. Key features include support for LoRa, (G)FSK and BPSK modulations, multiple regional bands (EU868 / IN865 / RU864), AT-command and RUI3 (RAKwireless Unified Interface v3) firmware modes, and a hardware sleep current measured in microamperes for coin-cell and Li-SOCl2 battery use. The integrated RF matching network and 32.768 kHz RTC crystal simplify host-board design, while exposed UART, SPI, I2C, ADC and GPIO lines let the module double as the application's main controller. Architecturally, the STM32WLE5 silicon mates an LPWAN radio block to a Cortex-M4 with FPU, providing hardware AES-256 for LoRaWAN payload encryption, an integrated DC-DC converter for the radio PA, and a sub-GHz front end that removes the need for an external SAW filter in most band plans. This depth of integration explains why the RAK3172 can match the range of earlier discrete-MCU + discrete-transceiver designs in a fraction of the PCB area. Typical deployments include battery-powered IoT sensors, smart agriculture probes, asset tracking, smart metering, environmental monitors, and LoRaWAN-to-Cellular gateways' downlink/uplink test fixtures. The wide -40 C to +85 C operating range covers industrial outdoor enclosures. A design tip: route the antenna trace on the host board only when the host owns the RF keep-out, since this -NI variant ships without an I-PEX connector and relies on a trace antenna or U.FL pigtail. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone.
RAK3172-9-SM-I - 9xx MHz LoRaWAN Module with IPEX | RAKwireless
The RAKwireless RAK3172-9-SM-I is a compact, low-power LoRaWAN transceiver module based on the STMicroelectronics STM32WLE5CC SoC, integrating an Arm Cortex-M4 32-bit core with 256 KB Flash and 64 KB SRAM alongside an embedded LoRa radio. The -9-SM-I suffix denotes the 902-928 MHz sub-band (915 MHz nominal center) variant with a surface-mount form factor and an IPEX/U.FL antenna connector footprint. The module measures 15.5 mm x 15.5 mm and operates over a 2.0 V to 3.6 V supply range. A LoRaWAN module is a long-range, low-power wireless data transceiver that uses Semtech's LoRa modulation to deliver multi-kilometer connectivity in sub-GHz ISM bands while consuming only microamps in sleep mode. LoRaWAN (Long Range Wide Area Network) is an open LPWAN protocol standardized by the LoRa Alliance that sits above LoRa modulation and defines the MAC layer, device classes, and join procedures used for massive IoT deployments. Key specifications include +20 dBm maximum RF output power, link budget supporting up to 15 km line-of-sight range, 5.22 mA typical receive current, 87 mA peak transmit current, and 1.69 uA sleep current. The module exposes SPI, UART, and I2C peripherals through a stamp-hole land pattern, enabling drop-in integration into host PCBs without RF design effort. System architecture is built around the STM32WLE5 single-chip solution, which fuses the application MCU and sub-GHz radio on a common silicon die, reducing BOM cost and bill of materials while retaining full LoRaWAN 1.0.3 Class A/B/C stack compatibility. Developers can use the RAK3172 Arduino library, AT command firmware, or the Zephyr RTOS BSP for embedded development. Typical applications include battery-powered wireless sensor networks, smart agriculture soil/irrigation telemetry, asset tracking and cold-chain logistics, smart metering for water/gas utilities, and LPWAN building automation. The IPEX connector enables external high-gain antenna mounting for chassis-mounted or outdoor enclosures. When designing with this module, place the IPEX connector trace away from switching nodes and ensure the host PCB provides adequate ground flooding under the antenna feed. For external SMA antenna routing, choose the -NI (no IPEX) variant and route the RF pad directly to the SMA connector - the -I variant is intended for IPEX-attached flex antennas. This page consolidates verified distributor pricing, parametric alternatives, and practical LoRaWAN design notes not duplicated in the RAK3172 datasheet.
RAK3172-9-SM-NI - LoRaWAN 915MHz Module, STM32WLE5, 15.5x15mm | RAKwireless
The RAKwireless RAK3172-9-SM-NI is a compact, low-power LoRaWAN transceiver module built around the STMicroelectronics STM32WLE5CCU6 SoC and supporting 915MHz, 920MHz, and 923MHz regional bands. The module is supplied in a 15.5x15 mm SMD package, operates from 2 V to 3.6 V, and is shipped without an integrated I-PEX antenna connector so designers can route the RF output to an external antenna or SMA pigtail. Per the RAKwireless datasheet, the module supports LoRaWAN 1.0.3 Classes A/B/C and exposes UART, SPI, and I2C host interfaces. A LoRaWAN module is a pre-certified radio transceiver that combines a long-range sub-GHz physical layer (typically based on Semtech SX126x or integrated equivalents inside the host SoC) with LoRaWAN MAC protocol firmware. These modules sit one level above a raw RF transceiver in the connectivity hierarchy and below the application MCU; they remove the burden of RF matching, antenna design, and regional regulatory certification, allowing engineers to add multi-kilometer wireless links to battery-powered IoT nodes. The RAK3172 integrates the LoRa modem directly inside the STM32WLE5CC application MCU, eliminating the external transceiver IC and shrinking BOM cost and PCB footprint. Key feature highlights include an LoRaWAN 1.0.3 Class A/B/C stack, a stated link range of up to 15 km in line-of-sight conditions, three low-power operating modes (transmit, receive, and sleep), and access to GPIO, ADC, and timers of the underlying Cortex-M4 host. The host runs an integrated LoRaWAN stack via AT commands or STM32Cube firmware, allowing rapid prototyping without external MCU glue logic. UART serves as the primary host interface for AT-command control, while SPI and I2C are exposed for direct MCU integration. The wide 2 V to 3.6 V supply range is well suited to single-cell Li-SoCl2, Li-ion, and 2x AA battery chemistries common in field-deployed sensors. The module is rated for an industrial operating temperature range of -40 C to +85 C. Its small 15.5x15 mm SMD footprint, combined with the absence of an I-PEX connector, makes it suitable for designs where the antenna is integrated on the host PCB (chip antenna or PCB trace) or routed via a pigtail to a chassis-mount SMA. Designers can leverage the Zephyr OS board support, RAK's AT-command firmware, or STM32Cube-based SDKs. Typical applications include battery-powered LoRaWAN end nodes, agricultural soil/moisture sensors, smart-city metering, asset tracking, and wireless alarm panels. Designers should evaluate antenna gain and ground clearance around the RF pad when migrating from the I-PEX-equipped RAK3172-9-SM-I to this no-I-PEX variant. A key design consideration is antenna selection: because the I-PEX connector is omitted, RF performance depends entirely on the external antenna implementation. A poorly matched antenna can reduce range by 10 dB or more. This page synthesizes distributor pricing, drop-in module alternatives, and field design notes that go beyond the manufacturer datasheet alone.
RAK3172-T - LoRaWAN Module, 20dBm, TCXO | RAKwireless | IoT
The RAKwireless RAK3172-T is a low-power, long-range LoRaWAN transceiver module based on the STMicroelectronics STM32WLE5CC RF System-on-Chip, delivering up to 20 dBm output power from a 2 V to 3.6 V supply in a compact 15.5 x 15 mm castellated SMD stamp package. The -T variant integrates a 32 MHz temperature-compensated crystal oscillator (TCXO) for superior RF frequency accuracy over the industrial -40C to +85C operating range. A LoRaWAN module is a complete wireless subsystem that implements the LoRaWAN 1.0.3 MAC protocol on top of LoRa spread-spectrum physical-layer modulation, sitting within the LPWAN (low-power wide-area network) family of radio technologies used across the industrial IoT stack. Unlike a bare LoRa transceiver IC, the RAK3172-T embeds the MCU, radio, and RF matching network, so a host board only needs a UART/SPI link and an antenna. Key features include compliance with LoRaWAN Class A, B, and C, support for both LoRaWAN networks and pure LoRa point-to-point communication, up to 15 km line-of-sight range, and low active current of approximately 5.22 mA RX / 87 mA TX. Interfaces include UART, SPI, and I2C, enabling AT-command operation via RAKwireless RUI3 firmware or custom STM32WL development with STM32CubeIDE. The STM32WLE5CC SoC integrates an Arm Cortex-M4 core with the sub-GHz LoRa radio on a single die, reducing BOM count and board area versus discrete transceiver-plus-MCU designs. Compatibility with The Things Network (TTN), ChirpStack, and Actility server platforms simplifies end-device provisioning. The TCXO reference delivers tighter frequency tolerance than the standard RAK3172 crystal version, improving duty-cycle compliance and link reliability at band edges (863-870 MHz EU868 / 902-928 MHz US915, depending on variant). Typical applications include battery-powered IoT sensors, smart metering, asset trackers, and agricultural or smart-city nodes where multi-kilometer range and multi-year battery life are essential. Design consideration: place the module near the board edge with a keep-out area beneath the antenna feed, and always verify your regional frequency variant (-8 for 868 MHz, -9 for 915 MHz) before ordering. This page synthesizes distributor pricing, drop-in module variants, and practical design notes not found in the manufacturer datasheet.
RAK3172-T-8-SM-I - LoRaWAN 868MHz STM32WLE5 WisDuo Module
The RAKwireless RAK3172-T-8-SM-I is a low-power, long-range LoRaWAN transceiver module based on the STMicroelectronics STM32WLE5CC SoC, integrating an Arm Cortex-M4 MCU core and Semtech SX126x LoRa radio in a single die. The -T-8-SM-I variant is the tape-and-reel packaged, 868 MHz EU868 band, SMD castellation module with IPEX antenna connector, operating from a 2V to 3.6V supply and delivering up to +20 dBm transmit power. A LoRaWAN module is a pre-certified, surface-mount wireless subsystem that combines a microcontroller, a sub-GHz radio transceiver, an RF matching network, and an antenna interface into a single reflow-solderable PCB module. Within the broader wireless hierarchy, a LoRaWAN module sits above a bare transceiver IC and below a complete LoRaWAN end-device; the module approach lets product designers skip RF layout certification and reuse already-approved LoRaWAN 1.0.3 stacks. The RAK3172 belongs to the LPWAN family of modules using Chirp Spread Spectrum (CSS) modulation for long range, low data rate, and robust urban penetration. Key specifications of the RAK3172-T-8-SM-I include a +20 dBm maximum TX output power, approximately 5.22 mA average receive current, and up to 87 mA peak current at full +20 dBm transmit output. The module is housed in a 15.5 mm × 15 mm SMD castellation package with an operating temperature range of -40°C to +85°C and an RF range of approximately 15 km line-of-sight. Communication interfaces supporting serial SPI, UART, and I2C peripherals are exposed through the castellated edge pads. The STM32WLE5CC SoC at the heart of the module embeds a Cortex-M4 core running up to 48 MHz with 256 Kbytes of Flash and 64 Kbytes of SRAM, alongside the Semtech SX1262-compatible radio IP. This single-die integration removes the SPI bus between MCU and radio that earlier discrete designs required and reduces BOM cost. The module is pre-certified for the EU868 LoRaWAN band and supports Class A, B, and C end-device classes per LoRaWAN 1.0.3 specification. Typical applications for the RAK3172-T-8-SM-I include battery-powered IoT sensors for smart agriculture soil moisture monitoring, livestock asset tracking, smart metering for gas and water utilities, environmental monitoring stations, and industrial equipment predictive maintenance nodes. The IPEX antenna connector allows external antenna selection per deployment scenario, and the small 15.5 × 15 mm footprint fits inside compact enclosures. When designing with this module, ensure the host PCB exposes the IPEX connector footprint if an external antenna is planned, and add at least 10 µF of bulk decoupling near the module supply pin. The castellation pads are the only electrical connection - hand soldering requires a hot plate or precise iron tip. Confirm regional LoRaWAN band selection before purchasing: the -8- variant is for EU868, while other variants cover US915, AU915, AS923, IN865, and KR920 regions. This page synthesizes distributor pricing, drop-in same-band variants, and practical design considerations beyond the manufacturer datasheet, providing an engineering-grade resource for module selection and PCB integration.
RAK3172-T-9-SM-I - LoRaWAN 9 LoRa Module | RAK3172 WisDuo LPWAN
The RAK3172-T-9-SM-I is a compact, low-power LoRaWAN transceiver module based on the STMicroelectronics STM32WLE5CCU6 SoC, housed in a 15.5 x 15 mm surface-mount package with an integrated IPEX antenna connector. It supports LoRa and FSK modulation across the 9-band (902-928 MHz, US915/AU915/AS923 sub-bands) and operates from a 2 V to 3.6 V supply at 87 mA continuous transmit current and 5.22 mA receive current, with a stated link range of up to 15 km line-of-sight. A LoRa module (LoRaWAN transceiver) is a radio-frequency sub-system that implements the physical layer of the LoRaWAN low-power wide-area networking protocol defined by the LoRa Alliance. Within a wireless IoT node hierarchy, a LoRa module sits below the sensor/MCU logic, above the antenna matching network, and is governed by class-A/B/C MAC behavior for uplink/downlink scheduling on sub-GHz ISM frequencies in unlicensed bands. Key features of the RAK3172-T-9-SM-I include ultra-low-power sleep current suitable for battery-operated nodes, integrated ARM Cortex-M4 application core inside the STM32WLE5, native LoRaWAN 1.0.3 Class A/B/C firmware compatibility, and an SPI/UART/I2C host interface for external sensor integration. The IPEX MHF4 antenna connector simplifies field-replacement antenna selection and supports external high-gain antennas. The architecture combines STMicroelectronics' STM32WLE5 SoC with an on-board TCXO and RF matching network; this delivers improved frequency stability across temperature and reduced phase noise compared with XTAL-only designs. Internal DC-DC and LDO regulation allow the module to operate directly from 2 V to 3.6 V sources including single-cell Li-SoCl2 primary batteries. Typical applications include long-range battery-powered IoT sensors, agricultural and environmental telemetry nodes, smart-metering AMR/AMI endpoints, asset tracking, and industrial SCADA wireless extensions. Engineers choose the RAK3172 family for design-reuse compatibility across global LoRaWAN regional bands (8/EU868, 9/US915, AS923) via the trailing band code in the ordering scheme. When designing with this module, ensure the host PCB reserves a clearance keep-out beneath the IPEX connector, and verify host-MCU UART logic levels are 3.3 V tolerant. Sleep-mode firmware configuration (STM32WL STOP2/STANDBY) is required to meet the uA-class standby current claims needed for multi-year battery life. This page synthesizes distributor stock, regional band ordering variants, and practical design notes that the manufacturer datasheet alone does not compile in a single view.
RC1682-SIG - 868MHz Sigfox Transceiver Module | Radiocrafts
The Radiocrafts RC1682-SIG is a compact surface-mount Sigfox transceiver module operating in the European 868 MHz ISM band, housed in a 12.7 x 25.4 x 3.7 mm castellation package. It integrates a communication controller with embedded SIGFOX protocol software and delivers +14 dBm output power with -126 dBm downlink sensitivity for long-range, ultra-narrowband IoT connectivity. The module operates from a 2.8 V to 3.6 V supply, drawing 31 mA in transmit and 59 mA in receive, and supports 100 bps uplink / 600 bps downlink data rates consistent with the Sigfox RC1/RC2 protocol zones. A UART host interface, integrated reset function, and pre-certified European regulatory compliance simplify end-product certification, while the castellation footprint enables standard SMT reflow assembly. Sigfox is a Low Power Wide Area Network (LPWAN) technology that occupies ultra-narrow bandwidth (typically 100 Hz to 1.5 kHz per channel) in license-exempt sub-1 GHz bands to achieve kilometers of range at sub-milliwatt average power. As an LPWAN transceiver module, the RC1682-SIG belongs to the broader family of radio modules (sub-category: ISM < 1GHz) that sit between a host microcontroller and the antenna, replacing discrete RF design with a pre-certified subsystem and accelerating time-to-market for low-data-rate IoT endpoints such as smart meters, asset trackers, environmental sensors, and agricultural monitors. Key features of the RC1682-SIG include +14 dBm maximum output power (compliant with European ERC 70-03 duty-cycle and ETSI EN 300 220 limits), -126 dBm receiver sensitivity to maximize link budget in challenging RF environments, 100 bps uplink / 600 bps downlink air-data rates, and adaptive frequency hopping across the 868.13 MHz TX / 869.525 MHz RX Sigfox operating channels. The module exposes a UART host interface, a hardware reset pin, and configuration GPIOs, and operates across -30 °C to +85 °C industrial temperature ranges. On-board MCU with embedded SIGFOX stack removes the need for an external protocol library on the host. The module combines a sub-1 GHz radio transceiver, an embedded microcontroller running the SIGFOX protocol stack, and a TCXO-controlled frequency reference in a single shielded package. This integration trades design flexibility for time-to-market, allowing developers to focus on sensor firmware and cloud connectivity rather than RF matching, regulatory pre-compliance, and protocol software ports. Compared with discrete sub-GHz ICs + external MCU implementations, the RC1682-SIG reduces the bill-of-materials, lowers PCB area, and removes the need for in-house RF expertise. Typical applications include smart metering (water, gas, electric utility endpoints), environmental monitoring (air-quality, soil-moisture, weather stations), asset tracking and cold-chain telemetry, agricultural automation (livestock, irrigation), smart city infrastructure (parking sensors, waste-bin level sensing), and industrial alarm/button signaling. The combination of long range (kilometers in line-of-sight), low power consumption during narrow-band transmissions, and European pre-certification makes it well suited to battery-powered IoT endpoints that must operate for years on a single cell. When designing with the RC1682-SIG, follow Radiocrafts reference layout guidelines: place the module over a ground keep-out area on the host PCB, route the antenna feed as a 50 ohm controlled-impedance trace, provide adequate decoupling near the supply pin, and reserve UART access for in-field firmware updates via RCTools-SIG. Designers should also account for transmit duty-cycle limits (typically 1 % per channel per hour under ETSI EN 300 220) when sizing uplink message frequency. This page synthesizes distributor pricing, same-family alternatives, and practical design notes not found in the manufacturer datasheet alone.
RC1682-SSM - 868MHz Sigfox Transceiver Module | Radiocrafts
The Radiocrafts RC1682-SSM is a fully integrated, autonomous sensor-enabled surface-mount RF transceiver module operating in the European 868 MHz ISM band with pre-certified Sigfox protocol stack and measuring only 12.7 x 25.4 x 3.7 mm. The module delivers +15 dBm typical output power, supports uplink data rates of 100 bps and downlink at 600 bps, and operates from a 2.8 V to 3.6 V supply while drawing 58 mA in transmit mode. Integrated sensor interface, Sigfox protocol software, and an on-board communication controller eliminate the need for an external MCU on the network side. A Sigfox transceiver module is a compact radio device that implements the Sigfox low-power wide-area network (LPWAN) protocol stack, enabling battery-powered end nodes to transmit small telemetry packets to a base station over distances of several kilometers in the sub-1 GHz spectrum. Sigfox modules sit at the lowest tier of the wireless connectivity hierarchy: wireless module -> LPWAN module -> sub-GHz ISM transceiver -> RF module -> electronic module. Within an IoT system the module typically belongs to the sensor-node layer, between the battery/power-management block and the external sensor(s) being reported. Key features of the RC1682-SSM include a castellated surface-mount land pattern for SMT reflow assembly, an integrated chip antenna interface, pre-compliance with European ETSI EN 300 220 radio regulations, and a UART/SPI host interface for command and payload transfer. The module is intended for sensor-only nodes that transmit on a fixed schedule and do not require bidirectional firmware updates. The architecture combines an integrated sub-GHz transceiver, an 8-bit communication controller running the Sigfox Monarch-ready protocol stack, on-board matching network, and a regulated supply block accepting 2.8-3.6 V. Internally generated timing references and factory-calibrated sigma-delta PLLs reduce external BOM cost and remove the need for crystal sourcing on the customer side. Typical applications include remote battery telemetry, agricultural soil-moisture monitoring, gas-meter and water-meter automatic meter reading (AMR), environmental sensors, and asset-tracking tags where only uplink reporting is needed and downlink receive is occasional. When designing with the RC1682-SSM, keep the antenna keep-out region free of copper on all four PCB layers within the first 5 mm around the RF feed path, and provision a 100 nF decoupling capacitor within 2 mm of the supply pin. Average link budget in line-of-sight conditions reaches +15 dBm TX and a receive sensitivity around -126 dBm at 600 bps. This page synthesizes distributor pricing across DigiKey and global warehouses, drop-in and functional alternatives, and practical RF design notes that are not present on the manufacturer datasheet - giving the engineer a single reference for sourcing, replacement, and evaluation decisions.
RC1692HP-SIG - 25dBm 915MHz Sigfox Transceiver Module | Radiocrafts AS
The Radiocrafts AS RC1692HP-SIG is a high-power, fully integrated Sigfox transceiver module operating in the 902-928 MHz ISM band (FCC/ACMA regions), delivered in a compact 12.7 x 25.4 x 3.3 mm castellation surface-mount package. It delivers up to 25 dBm (316 mW) of output power, supports Sigfox uplink and downlink at 600 bps, and operates from a 2.8 V to 3.6 V supply while drawing approximately 36 mA in receive mode. A Sigfox transceiver module is a wireless radio subsystem that bundles the RF front-end, a microcontroller running the embedded Sigfox protocol stack, and regulatory-certified firmware into a single surface-mount device. Sigfox is a low-power wide-area network (LPWAN) protocol used for ultra-narrow-band IoT telemetry in the sub-1 GHz ISM bands. The RC1692HP-SIG belongs to the Radiocrafts RC1692 family of compact Sigfox modules, which are FCC- and ACMA-pre-certified, allowing end-product designers to skip most RF compliance testing. Key features include an integrated 25 dBm power amplifier for long-range links, on-board antenna matching network with U.FL RF connector option (depending on variant), built-in AES-128 hardware encryption, and a UART host interface for AT-command configuration. The module is pre-loaded with Sigfox library and is shipped with a unique device ID and PAC code for network registration. Low-power sleep modes reduce current consumption to microamp levels for battery-powered deployments. The RC1692HP-SIG uses a Silicon Labs sub-GHz transceiver IC paired with an embedded protocol controller running the Sigfox stack. Internal TCXO provides frequency stability across industrial temperature ranges. The 12.7 x 25.4 x 3.3 mm footprint is a standardized land pattern used across the Radiocrafts RC16xx family, allowing PCB reuse across regional variants (EU868, US915, AU915). Typical applications include wireless IoT sensor nodes for asset tracking, environmental monitoring, smart agriculture soil/moisture telemetry, smart metering backhaul, and industrial equipment monitoring in factories. The 25 dBm output power extends link budget to several kilometers in line-of-sight conditions, making it suitable for rural and wide-area deployments. When designing with this module, host firmware must initialize the UART interface at the correct baud rate and load the Sigfox PAC during onboarding. Engineers should follow the reference layout in the RC1692HP-SIG user manual for RF trace impedance and decoupling to preserve FCC/ACMA certification status. This page synthesizes distributor pricing, drop-in regional variants, and practical RF design notes not consolidated in the manufacturer datasheet, giving engineers a faster procurement and design entry point for Sigfox-enabled IoT products.