EP3SE110F780C4L vs EP3SE50F780C4L 对比

详细并排对比 EP3SE110F780C4L 出自 Intel 和 EP3SE50F780C4L 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP3SE110F780C4L EP3SE50F780C4L
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 不推荐新设计
库存状态 有库存 有库存
单价(USD) $1,550.00 $1,320.00
Series Stratix III E Stratix III E
Number of Logic Elements (LE) 107,500 —
Number of Logic Array Blocks (LAB) [DATA_NEEDED: number of LABs] —
Total Memory Bits 8,936,448 bits —
Number of 18x18 Multipliers 488 —
Number of PLLs [DATA_NEEDED: PLL count] —
User I/O Pins 488 —
Speed Grade -4 (commercial) C4 (commercial, speed 4)
Process Variant L (low-leakage) —
工作温度 0C to +85C (commercial) [DATA_NEEDED: full industrial/commercial grade]
Supply Voltage (Core) [DATA_NEEDED: core voltage] —
Package Type 780-Ball FCBGA —
Ball Pitch 1.0 mm —
安装类型 Surface Mount —
Process Technology 65 nm CMOS —
RoHS 状态 Compliant Compliant (lead-free)
MSL 等级 3 (per JEDEC J-STD-020) —
Family — Stratix III
Logic Elements (LE) — 47,500
Embedded Memory — 5,760,000 bits
User I/Os — 488
DSP Blocks (18x18 multipliers) — 304 (19x16)
封装 — 780-ball FCBGA (Flip-Chip BGA)
Process Node — 40 nm
Core Voltage — 1.1 V
Lead-Free (L suffix) — Yes
Configuration Method — Passive Serial / Fast Passive Parallel / JTAG / Enhanced
Transceivers — [DATA_NEEDED: per Stratix III E variant]
PLLs — [DATA_NEEDED: PLL count]

数据手册与资源

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