EPM9320LC84-20N vs EPM9320LC84-15 对比

详细并排对比 EPM9320LC84-20N 出自 Intel 和 EPM9320LC84-15 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM9320LC84-20N EPM9320LC84-15
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 Obsolete
库存状态 有库存 有库存
单价(USD) $10.25 $17.95
Series MAX 9000 EPM9320
Logic Family CMOS (EEPROM-based) —
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Usable Gates 6,000 6,000
Macrocells 320 320
User I/Os 60 —
引脚数 84 —
Package Type Plastic Leaded Chip Carrier (PLCC-84, J-bend) —
Package Code QCCJ —
Propagation Delay (tPD) 16 ns 15 ns (max)
Internal Frequency 118 MHz —
Supply Voltage (VCC) 5 V 4.75 V to 5.25 V (5.0 V nominal)
工作温度 0 C to +70 C (Commercial) -40C to +85C (commercial) [DATA_NEEDED: exact grade]
Programming 5.0-V In-System Programmable via JTAG (IEEE 1149.1) —
安装类型 Surface Mount (J-bend) Surface Mount
Terminal Form J BEND —
MSL 等级 [DATA_NEEDED: MSL moisture sensitivity level] —
RoHS 状态 [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: confirm from manufacturer]
Family — MAX 9000
Logic Array Blocks (LABs) — 20
最大时钟频率 — 117.6 MHz
Programmability — 5.0 V in-system programmable (ISP) via JTAG
JTAG Interface — IEEE Std. 1149.1 boundary-scan compliant
封装 — 84-pin PLCC (Plastic Leaded Chip Carrier)
Technology — CMOS EEPROM-based, third-generation Multiple Array MatriX (MAX)
Built-in Pull-up Resistors — Yes, on every I/O pin
Architecture Feature — Pin-locking across design iterations

数据手册与资源

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