EP610LI-15 vs EP610IDC-15 Comparison

Detailed side-by-side comparison of EP610LI-15 by Altera and EP610IDC-15 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EP610LI-15

EP610LI-15 - 16-Macrocell CMOS EPLD, 15ns tPD | Altera (Rochester)

EP610LI-15 ⚠ Last Time Buy
Intel
EP610IDC-15

EP610IDC-15 - 16-Macrocell Classic EPLD, 15ns, 24-CerDIP | Intel

EP610IDC-15 ⚠ Last Time Buy

Specification Comparison

Parameter EP610LI-15 EP610IDC-15
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last_time_buy Last_time_buy
Stock Status In Stock In Stock
Unit Price (USD) $48.50 $9.95
Device Family Classic EPLD EP610 Altera Classic EPLD
Macrocells 16 16
Propagation Delay (tPD) 15 ns 15 ns
Counter Frequency (fCNT) 83.3 MHz β€”
Supply Voltage (VCC) 4.75 V to 5.25 V (5 V nominal) 4.75 V to 5.25 V (5 V nominal)
Operating Temperature 0 C to +70 C (commercial, "I" grade) 0C to +70C (commercial)
Process Technology CMOS EPROM (UV-erasable) CMOS, UV-erasable / OTP
Package 24-pin ceramic DIP, side-brazed, windowed (DIP-24) 24-pin CerDIP (ceramic DIP)
Pin Count 24 β€”
Programming Method UV erase + EPROM programmer β€”
Logic Blocks AND/OR array, 16 output macrocells β€”
I/O Standard TTL/CMOS compatible β€”
Output Type 3-state β€”
RoHS Status Non-compliant (ceramic DIP, SnPb finish typical) [DATA_NEEDED: RoHS status of CerDIP variant]
Manufacturer (current) Rochester Electronics (authorized Altera legacy distributor) β€”
MSL Level [DATA_NEEDED: MSL level] β€”
Usable Gates β€” 300
Maximum Frequency β€” 66 MHz
Mounting Type β€” Through-hole
I/O Pins β€” 24 (per package; macrocell-programmable)
Logic-Block Architecture β€” AND/OR macrocell array with programmable flip-flops
Program/Erase β€” UV-erasable, OTP-compatible
Development Tool β€” MAX+PLUS II
Programming Current β€” 11.0 mA typical (per Classic family datasheet)

Datasheets & Resources

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