EPM3128ATC144-7N vs EPM3128ATI144-10 Comparison

Detailed side-by-side comparison of EPM3128ATC144-7N by Altera and EPM3128ATI144-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3128ATC144-7N EPM3128ATI144-10
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active NRND
Unit Price (USD) $9.25 —
Series MAX 3000A —
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Architecture EEPROM-based, MAX architecture —
Number of Macrocells 128 —
Number of Usable Gates Up to 10,000 —
User I/Os 96 98
Pin Count 144 144
Package TQFP-144 (20 x 20 mm, 0.5 mm pitch) TQFP-144 (FINE LINE)
Logic Family CMOS CMOS, EEPROM-based
Propagation Delay (tPD) 7.5 ns (pin-to-pin, -7 speed grade) —
Counter Frequency Up to 227.3 MHz 98 MHz typical
Core Supply Voltage (VCCINT) 3.3 V —
I/O Supply Voltage (VCCIO) 2.5 V / 3.3 V / 5.0 V (MultiVolt) —
Operating Temperature 0 °C to +70 °C (commercial) -40C to +85C (Industrial)
In-System Programmability (ISP) Yes, via JTAG (IEEE 1149.1) —
PCI Compliance Compatible with PCI Local Bus Specification Rev. 2.2 PCI Local Bus Spec Rev 2.2 (speed grades -4 to -10)
Mounting Type Surface Mount (SMD/SMT) Surface Mount (Gull-Wing TQFP)
RoHS Status Lead-free (-7N suffix indicates Pb-free finish) Compliant (lead-free TQFP)
Family — MAX 3000A
Usable Gates — 2,500
Macro Cells — 128
Logic Array Blocks (LABs) — 8
Supply Voltage (VCCINT) — 3.3 V
Pin-to-Pin Delay — 10 ns (speed grade -10)
Programming Interface — IEEE 1149.1 JTAG (ISP)

Datasheets & Resources

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