EPM5192AGC84-20 vs EPM5192AJI84-20 Comparison
Detailed side-by-side comparison of EPM5192AGC84-20 by Altera and EPM5192AJI84-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5192AGC84-20 | EPM5192AJI84-20 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $41.20 | $10.95 |
| Product Type | Complex Programmable Logic Device (CPLD) | β |
| Family | MAX 5000 | β |
| Macrocells | 192 | β |
| User I/O Pins | 64 | β |
| Dedicated Inputs | 7 | β |
| Logic Gates (typical) | [DATA_NEEDED: typical gate count] | β |
| Maximum Clock Frequency (fMAX) | 66.7 MHz | β |
| Pin-to-Pin Delay (tPD) | 20 ns | β |
| Speed Grade | -20 | β |
| Package | 84-pin Ceramic Pin Grid Array (CPGA, WPGA) | β |
| Package Code | WPGA | WQCCJ (JEDEC) |
| Erasure Method | UV-Erasable (with OTP window) | β |
| Process Technology | CMOS | CMOS |
| Operating Temperature Grade | Commercial | Industrial |
| Supply Voltage | [DATA_NEEDED: VCC range] | β |
| I/O Standard | 5V CMOS / TTL compatible | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status of EPM5192AJI84-20] |
| Mounting Type | Through-Hole (Pin Grid Array socket) | Surface Mount |
| Device Family | β | MAX 5000 (EPM5192) |
| Logic Cells / Macrocells | β | 192 macrocells |
| Device Type | β | UV-Erasable / OTP Complex PLD |
| Propagation Delay (tPD) | β | 33 ns |
| Maximum Frequency (fCNT) | β | 66.7 MHz |
| Supply Voltage (VCC) | β | 5 V nominal (4.5 V to 5.5 V) |
| Package Type | β | 84-pin J-bend Ceramic Chip Carrier (PLCC-84, JI) |
| Terminal Form | β | J-Bend |
| Number of Terminals | β | 84 |
| Programmability | β | UV-erasable window + OTP |
| Pin Count | β | 84 |
| Lifecycle Status | β | Obsolete (legacy Altera MAX 5000) |