EPM5192AGC84-20 vs EPM5192AJI84-20 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM5192AGC84-20 disebabkan oleh Altera dan EPM5192AJI84-20 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM5192AGC84-20 EPM5192AJI84-20
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Product Type Complex Programmable Logic Device (CPLD) —
Family MAX 5000 —
Macrocells 192 —
User I/O Pins 64 —
Dedicated Inputs 7 —
Logic Gates (typical) [DATA_NEEDED: typical gate count] —
Maximum Clock Frequency (fMAX) 66.7 MHz —
Pin-to-Pin Delay (tPD) 20 ns —
Speed Grade -20 —
Kemasan 84-pin Ceramic Pin Grid Array (CPGA, WPGA) —
Package Code WPGA WQCCJ (JEDEC)
Erasure Method UV-Erasable (with OTP window) —
Process Technology CMOS CMOS
Operating Temperature Grade Commercial Industrial
Tegangan Pemberi Arus [DATA_NEEDED: VCC range] —
I/O Standard 5V CMOS / TTL compatible —
Status RoHS [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: RoHS status of EPM5192AJI84-20]
Jenis Pemasangan Through-Hole (Pin Grid Array socket) Surface Mount
Device Family — MAX 5000 (EPM5192)
Logic Cells / Macrocells — 192 macrocells
Device Type — UV-Erasable / OTP Complex PLD
Propagation Delay (tPD) — 33 ns
Maximum Frequency (fCNT) — 66.7 MHz
Supply Voltage (VCC) — 5 V nominal (4.5 V to 5.5 V)
Package Type — 84-pin J-bend Ceramic Chip Carrier (PLCC-84, JI)
Terminal Form — J-Bend
Number of Terminals — 84
Programmability — UV-erasable window + OTP
Kiraan Pin — 84
Status Lingkungan Hidup — Obsolete (legacy Altera MAX 5000)

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