EPM7128STC100-10 vs EPM7128SQC100-15 Comparison
Detailed side-by-side comparison of EPM7128STC100-10 by Altera and EPM7128SQC100-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7128STC100-10
EPM7128STC100-10 - 128-Macro MAX 7000S CPLD, 10ns TQFP-100 | Intel / Altera
EPM7128STC100-10 ObsoleteAltera
EPM7128SQC100-15 - MAX 7000 CPLD 128MC 15ns 5V | Altera/Intel
EPM7128SQC100-15 β Last Time BuySpecification Comparison
| Parameter | EPM7128STC100-10 | EPM7128SQC100-15 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $7.10 | $8.20 |
| Family | MAX 7000S | MAX 7000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macro Cells | 128 | β |
| Usable Gates | 2,500 | β |
| User I/Os | 84 | 84 |
| Logic Array Blocks | 8 (16 macrocells per LAB) | β |
| Propagation Delay (tPD) | 10 ns | β |
| Internal Counter Frequency (fCNT) | 100 MHz | β |
| Logic Family | CMOS | β |
| Supply Voltage (VCCINT) | 5 V | 5 V (5% tolerance) |
| MultiVolt I/O Voltage | 3.3 V / 5 V | β |
| Package | TQFP-100 (C100) | 100-pin PQFP (Plastic Quad Flat Pack) |
| Pin Count | 100 | β |
| Mounting Type | Surface Mount | Surface Mount |
| Programmability | In-System Programmable (JTAG, IEEE 1149.1), EEPROM | β |
| Operating Temperature | 0C to +70C (commercial) | 0C to +70C (Commercial) |
| RoHS Status | [DATA_NEEDED: RoHS compliance status not in provided data] | Non-compliant (SnPb lead finish - legacy PQFP) |
| Macrocells | β | 128 |
| Logic Array Blocks (LABs) | β | 4 (16 macrocells each) |
| Pin-to-Pin Delay (tPD) | β | 15 ns |
| Maximum Frequency (fMAX) | β | [DATA_NEEDED: fMAX value] |
| Typical Gate Count | β | 2,500 gates |
| Programming Technology | β | EEPROM (in-system programmable via JTAG) |
| JTAG Interface | β | IEEE Std. 1149.1 compliant |
| MSL Level | β | 3 (168 hours) |