EPM9320RC208-20 vs EPM9320GC280-20 Comparison
Detailed side-by-side comparison of EPM9320RC208-20 by Altera and EPM9320GC280-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9320RC208-20 | EPM9320GC280-20 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $21.90 | $67.00 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 320 | 320 |
| Logic Array Blocks (LABs) | 20 | 20 (16 macrocells each, typical for MAX 9000) |
| Usable Gates | 6,000 | 6000 (approx.) |
| Maximum I/O Pins | 132 | β |
| Propagation Delay (tPD max) | 20 ns | β |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V | β |
| Programming Technology | EEPROM, in-system programmable (ISP) | β |
| Boundary-Scan Interface | IEEE Std. 1149.1 (JTAG) | β |
| Operating Temperature | 0 Β°C to 70 Β°C (commercial) | [DATA_NEEDED: operating temperature grade] |
| Package | 208-RQFP, exposed pad (208-BFQFP) | 280-pin Ceramic Pin Grid Array (CPGA) |
| Mounting Type | Surface Mount | Through-Hole (PGA socket) |
| Architecture | Multiple Array Matrix (MAX), 3rd generation | β |
| Process Technology | CMOS, 5.0 V EEPROM | β |
| Reprogrammability | Yes, unlimited ISP cycles | β |
| Maximum Operating Frequency | β | 100 MHz (internal counter) |
| Propagation Delay (tpd) | β | 23 ns (approx., -20 speed grade) |
| Supply Voltage (VCC) | β | 4.75 V to 5.25 V (5 V nominal) |
| Technology | β | CMOS EEPROM |
| In-System Programmability | β | Yes (5.0-V ISP via JTAG) |
| JTAG Support | β | IEEE Std. 1149.1 compliant |
| RoHS Status | β | unknown |
| Configuration Memory | β | EEPROM (non-volatile, instant-on) |