SN65LVDS105PWRG4 vs SN65LVDS105PWR Comparison
Detailed side-by-side comparison of SN65LVDS105PWRG4 by Texas Instruments and SN65LVDS105PWR by Texas Instruments. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Texas Instruments
SN65LVDS105PWRG4 - 1:4 LVDS Clock Fanout Buffer 400Mbps | TI
SN65LVDS105PWRG4 ✗ End of LifeTexas Instruments
SN65LVDS105PWR - 1:4 LVDS Clock Fanout Buffer 400Mbps | TI
SN65LVDS105PWR ✓ ActiveSpecification Comparison
| Parameter | SN65LVDS105PWRG4 | SN65LVDS105PWR |
|---|---|---|
| Brand | Texas Instruments | Texas Instruments |
| Category | Clock & Timing | Clock & Timing |
| Lifecycle Status | End of Life | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $0.00 | $1.28 |
| Function | 1 LVTTL to 4 LVDS clock fanout buffer / repeater | 1 LVTTL input to 4 LVDS output repeater / fanout buffer |
| Configuration | 1 x 1:4 Channel | — |
| Input Type | LVTTL | LVTTL (single-ended) |
| Output Type | LVDS (4 differential pairs) | LVDS (differential), 4 pairs |
| Max Data Rate | 400 Mbps | — |
| Supply Voltage Range | 3 V to 3.6 V | — |
| Typical Propagation Delay | 2.2 ns | — |
| Typical LVDS Output Voltage | 285 mV into 100 ohm load | — |
| Signaling Standard | ANSI EIA/TIA-644 (LVDS) | — |
| Bus-Terminal ESD Rating | Exceeds 12 kV | — |
| Package | TSSOP-16 (PW), 5 mm x 6.4 mm | 16-TSSOP (PW) |
| Mounting Type | Surface Mount | Surface Mount |
| Packaging | Tape & Reel (PWR suffix) | — |
| Category | Interface - Signal Buffers, Repeaters, Splitters | Signal Buffers, Repeaters, Splitters - Clock Buffer |
| RoHS Status | [DATA_NEEDED: RoHS status] | — |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Lifecycle Status | Discontinued at Digi-Key | — |
| Data Rate | — | 400 Mbps |
| Max Clock Frequency | — | 400 MHz |
| Supply Voltage | — | 3 V to 3.6 V (typical 3.3 V) |
| Output Voltage (typical) | — | 350 mV into 100 ohm load |
| Standard Compliance | — | ANSI EIA/TIA-644 LVDS |
| Channels | — | 1 x 1:4 |
| Technology | — | LVDS differential signaling |
| Quiescent Current | — | [DATA_NEEDED: quiescent current] |
| Input Rise/Fall Time Note | — | TTL/CMOS rise/fall < 500 ps may require low-Dk laminate per TI layout guidance |