H5AN4G8NBJR-PBC vs MT40A512M8RH-083E Comparación
Comparación detallada lado a lado de H5AN4G8NBJR-PBC por SK hynix y MT40A512M8RH-083E por Micron Technology. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | H5AN4G8NBJR-PBC | MT40A512M8RH-083E |
|---|---|---|
| Marca | SK hynix | Micron Technology |
| Categoría | Memory ICs | Memory ICs |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $2,20 | $3,30 |
| Memory Density | 4 Gbit | — |
| Organización de memoria | 512M x 8 | 512M x 8 |
| Tipo de memoria | DDR4 SDRAM | DDR4 SDRAM |
| Tipo de interfaz | Parallel, JEDEC DDR4 | — |
| Supply Voltage VDD | 1.2 V | — |
| Supply Voltage VDDQ | 1.2 V | — |
| Speed Grade | PBC | — |
| Clock Frequency | [DATA_NEEDED: Clock Frequency] | — |
| CAS Latency (CL) | [DATA_NEEDED: CAS Latency] | — |
| Encapsulado | 78-ball FBGA | 78-ball FBGA (9 x 10.5 mm) |
| Tipo de montaje | Surface Mount | — |
| Normal Operating Case Temperature | 0C to 85C | — |
| Extended Temperature Range | up to 95C case (with increased refresh) | — |
| Lead Free | Yes | — |
| Sin halógenos | Yes | — |
| Refresh | 8n prefetch, standard/auto refresh per DDR4 JEDEC | 64 ms, 8192-cycle refresh (to 95C) |
| Density | — | 4 Gbit |
| Industry Speed Grade | — | DDR4-2400 |
| Clock Rate | — | 1.2 GHz |
| Internal Banks | — | 8 banks (2 groups of 4) |
| Prefetch | — | 8n-bit |
| VDD / VDDQ | — | 1.2 V +/-60 mV |
| VPP | — | 2.5 V, -125 mV/+250 mV |
| I/O Structure | — | 1.2 V pseudo open-drain |
| VREFDQ | — | On-die internal, adjustable generation |
| Temperatura de funcionamiento | — | 0C to +95C |
| FBGA Code | — | D9TGG |
| Marking Code | — | D9TGG |
| Data Strobe Preamble | — | Programmable |
| Estado RoHS | — | Compliant |
| Latencia CAS | — | [DATA_NEEDED: CAS latency per speed bin table] |