EP610DC-35 vs EP610DM-35 مقایسه
مقایسه دقیق کنار به کنار EP610DC-35 توسط Altera و EP610DM-35 توسط Altera. مشخصات کلیدی، پارامترهای الکتریکی، بستهبندی، وضعیت چرخه عمر، قیمتگذاری و موجودی را مقایسه کنید تا بهترین قطعه را برای نیازهای طراحی خود تعیین کنید.
مقایسه مشخصات
| پارامتر | EP610DC-35 | EP610DM-35 |
|---|---|---|
| برند | Altera | Altera |
| دستهبندی | FPGA & CPLD | FPGA & CPLD |
| وضعیت چرخه عمر | NRND | Obsolete |
| Device Type | CPLD - Classic EPLD | — |
| Family | Altera Classic EP610 | — |
| Macrocells | 16 | — |
| Usable Gates | 300 | — |
| Propagation Delay (tPD) | 35 ns | 35 ns |
| Maximum Frequency (fMAX) | 28.6 MHz | — |
| Pipelined Data Rate | up to 100 MHz | — |
| Supply Voltage (VCC) | 5 V | 5 V (single supply) |
| Process Technology | CMOS | — |
| Program/erase Method | UV-erasable (windowed CERDIP) | — |
| بستهبندی | 24-pin CDIP (windowed CERDIP) 0.300 inch | 24-pin CDIP (CERDIP) with UV window |
| نوع نصب | Through-Hole (DIP) | — |
| دمای کاری | 0C to +70C (commercial) [DATA_NEEDED: explicit range from datasheet] | — |
| Manufacturer | Originally Altera; today supplied via Rochester Electronics (authorized) | Altera (Rochester Electronics authorized stock) |
| وضعیت RoHS | [DATA_NEEDED: not explicitly confirmed in retrieved data; CERDIP packages typically non-RoHS] | Non-compliant (contains lead, hermetic CERDIP) |
| Part Family | — | Classic EPLD |
| Logic Family | — | PAL-type EPLD, CMOS, UV-erasable |
| Number of Macrocells | — | 16 |
| Number of Gates | — | 300 |
| Pipelined Data Rate (fMAX) | — | 100 MHz |
| Temperature Grade (M) | — | Military -55°C to +125°C |
| I/O Pins | — | 24 dedicated I/O (input + bidirectional) |
| Programmability | — | UV-erasable, reprogrammable |
| محدوده دمای کاری | — | -55°C to +125°C |
| سطح MSL | — | [DATA_NEEDED: MSL rating] |