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XC3090L-8TQ176I - 5000 Gates FPGA, 320 CLBs, 80 MHz | Xilinx

Référence : XC3090L-8TQ176I ✗ Fin de vie

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5 V Vdss TQFP-176 (TQ176) 24x24 mm, gull-wing leads Package 80 MHz Speed

À partir de $85 USD / unité

MOQ : 1 |

Prix mis à jour : 2026-09-13

Tarifs dégressifs

Qté	Prix unitaire	Total
1	$145	$145,00
10	$128	$1 280,00
100	$112	$11 200,00
500	$98	$49 000,00
1 000	$85	$85 000,00

ℹ️ Tous les prix sont en USD

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XC3090L-8TQ176I Présentation

The Xilinx XC3090L-8TQ176I is a CMOS Field-Programmable Gate Array from the legacy XC3000 series offering 320 Configurable Logic Blocks (CLBs), a maximum of 5000 equivalent gates, and up to 6000 usable gates, housed in a 176-pin TQFP (TQ176) surface-mount package with industrial temperature grading. The device is built on a 0.6 um CMOS process and operates from a single 5V supply with a maximum clock frequency of 80 MHz and a combinatorial CLB delay of 6.7 ns at the -8 speed grade.

A Field-Programmable Gate Array (FPGA) is a type of programmable logic device (PLD) that combines a perimeter of user-configurable I/O Blocks (IOBs) with a core array of Configurable Logic Blocks (CLBs) and programmable interconnect, all controlled by an SRAM-based configuration program store. FPGAs sit hierarchically under programmable logic, then digital integrated circuits, and ultimately the broader semiconductor taxonomy; the XC3000 family occupies the early-generation, 5V legacy tier that preceded modern low-power Virtex and Kintex families.

Key features include 144 user I/Os in the TQ176 footprint, distributed on-chip RAM, JTAG boundary-scan support, and tri-state buffers per IOB. The architecture supports asynchronous and synchronous design entry through Xilinx's XACT development system, including schematic capture, automatic place-and-route, logic and timing simulation, and interactive design optimization. The -8 speed grade denotes the mid-tier performance bin of the XC3090L family, with faster -9/-10 grades unavailable in this part number and slower -6/-7 grades reserved for cost-sensitive designs.

Typical applications include industrial control glue logic, legacy telecom backplane interfaces, military and aerospace retrofit boards, and educational laboratory trainers where designers migrate proven XC3000 designs forward without re-validating timing closure. The wide 5V tolerance and TTL-compatible I/Os also make it suitable for bridging older ASICs to newer microprocessors.

When designing with this part, treat the 6.7 ns CLB delay as the budget floor for the slowest logic path: multiply by the number of cascaded CLBs and add interconnect delay to estimate the system clock. Configuration storage is volatile, so external PROMs (XC17xx) are required for standalone boot.

This page synthesizes distributor stock, lifecycle status, same-package alternatives, and practical design notes not found in the standalone XC3090L datasheet, designed to assist sourcing engineers working on legacy Xilinx FPGA maintenance and obsolescence mitigation.

Alternatives de remplacement direct pour XC3090L-8TQ176I — même boîtier, compatible broche à broche. Les références à boîtier différent nécessitant une retouche du PCB sont exclues.

Variantes de cette série

Modèles de la même série directement compatibles avec XC3090L-8TQ176I (même facteur de forme et même empreinte) — différant par Package, Speed Grade, Configuration Memory, Process Technology, Family.

XC3090L-6TQ176I

Xilinx

Package: TQFP-176 (TQ176)

Speed Grade: -6

Configuration Memory: SRAM (volatile, external PROM required)