EP3SE50F484C3G vs EP3SE50F484C2G तुलना
विस्तृत दोनों ओर की तुलना EP3SE50F484C3G द्वारा Intel और EP3SE50F484C2G द्वारा Intel. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | EP3SE50F484C3G | EP3SE50F484C2G |
|---|---|---|
| ब्रांड | Intel | Intel |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | NRND | अंतिम बार खरीदें |
| Family | Stratix III E | — |
| Logic Elements | 47,500 | — |
| Adaptive Logic Modules (ALMs) | 19,000 | — |
| Total Embedded Memory | 5,760,000 bits (5.76 Mbit) | — |
| M9K Memory Blocks | 320 (2,304 Kbits) | — |
| M144K Memory Blocks | 12 (1,728 Kbits) | — |
| User I/O Pins | 296 | — |
| 18x18 Multipliers | 384 | — |
| PLLs | 4 | — |
| Global Clock Networks | 16 | — |
| पैकेज | 484-ball FCBGA (F484), 1.0 mm pitch | — |
| Speed Grade | C3 | — |
| ऑपरेटिंग तापमान | 0C to +85C (commercial, "C") | 0 °C to +85 °C (TJ) |
| Process Node | 65 nm TSMC low-power | — |
| Core Voltage | 1.1 V | — |
| माउंटिंग प्रकार | Surface Mount | Surface Mount |
| RoHS स्थिति | Compliant (lead-free) | Compliant |
| Series | — | Stratix III E |
| Number of Logic Elements / Cells | — | 47,500 |
| Number of LABs / CLBs | — | 1,900 |
| Total RAM Bits | — | 5,760,000 (5,760 Kbit) |
| Number of User I/O | — | 296 |
| पैकेज / केस | — | 484-BBGA, FCBGA (FineLine BGA) |
| Core Voltage Supply | — | 0.86 V to 1.15 V |
| Process Technology | — | 40 nm TSMC low-power CMOS |
| Logic Element Architecture | — | Adaptive Logic Module (ALM) with 8-input fracturable LUT |
| Embedded DSP Blocks | — | Yes (variable-precision multipliers) |
| Transceivers | — | Multi-gigabit transceivers (selected package pins) |
| Memory Interface Support | — | DDR / DDR2 / DDR3 with hard PHY |
| Partial Reconfiguration | — | Supported |
| Configuration Interface | — | JTAG, Passive Serial, Fast Passive Parallel |
| Part Status | — | Active (Intel catalogue); long-term supply subject to Stratix III lifecycle policy |