EPF10K200EFC672-3 vs EPF10K250EFI672-3 तुलना
विस्तृत दोनों ओर की तुलना EPF10K200EFC672-3 द्वारा Intel और EPF10K250EFI672-3 द्वारा Intel. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Intel
EPF10K200EFC672-3 - FLEX 10KE FPGA 9984 Cells 470 I/O BGA-672 | Intel
EPF10K200EFC672-3 Obsolete
विशेषता तुलना
| पैरामीटर | EPF10K200EFC672-3 | EPF10K250EFI672-3 |
|---|---|---|
| ब्रांड | Intel | Intel |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | Obsolete | NRND |
| Series | FLEX 10KE | — |
| Number of Logic Elements / Cells | 9,984 | — |
| Number of LABs / CLBs | 1248 | — |
| Total RAM Bits | 98,304 bits (12 EABs of 8 Kbits) | — |
| Number of I/O | 470 | — |
| Number of Gates (typical) | 200,000 | — |
| Supply Voltage - Operating | 2.3 V to 2.7 V (2.5 V nominal) | — |
| Process Technology | 0.22 µm CMOS | CMOS, SRAM-based configuration |
| Maximum Operating Frequency | 166.67 MHz | — |
| Propagation Delay | 0.4 ns | — |
| पैकेज / केस | 672-BBGA (27 x 27 mm, 1.0 mm pitch, FineLine BGA) | — |
| माउंटिंग प्रकार | Surface Mount | — |
| ऑपरेटिंग तापमान | 0 °C to +70 °C (commercial) | 0 °C to 70 °C (commercial) |
| Configuration Memory | SRAM-based (volatile, requires external configuration device) | — |
| Number of PLLs | 4 | — |
| RoHS स्थिति | [DATA_NEEDED: rohs status] | Unknown (legacy Altera non-RoHS device) |
| MSL स्तर | [DATA_NEEDED: MSL level] | — |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Family | — | FLEX 10KE |
| Typical Gates | — | 250,000 |
| Logic Elements | — | [DATA_NEEDED: exact LE count] |
| User I/O Pins | — | 470 |
| Embedded Array Blocks (EABs) | — | 12 |
| EAB Dual-Port Width | — | Up to 16-bit |
| Maximum EAB Memory | — | [DATA_NEEDED: bits per EAB] |
| Propagation Delay (tpd) | — | 0.4 ns (typical, -3 speed grade) |
| Core Supply Voltage | — | 2.5 V |
| I/O Supply Voltage | — | 2.5 V / 3.3 V (multiVolt I/O) |
| पैकेज | — | 672-ball FineLine BGA, 1.27 mm pitch |
| Configuration Interface | — | JTAG / ByteBlaster (EPC2/EPC8 PROM) |
| Design Entry | — | EDIF 2 0 0 / 3 0 0, LPM, VHDL, Verilog |