SN65LVDS105PWR vs TD1205 तुलना
विस्तृत दोनों ओर की तुलना SN65LVDS105PWR द्वारा Texas Instruments और TD1205 द्वारा TD next. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Texas Instruments
SN65LVDS105PWR - 1:4 LVDS Clock Fanout Buffer 400Mbps | TI
SN65LVDS105PWR ✓ सक्रिय
विशेषता तुलना
| पैरामीटर | SN65LVDS105PWR | TD1205 |
|---|---|---|
| ब्रांड | Texas Instruments | TD next |
| श्रेणी | Clock & Timing | RF Modules |
| लाइफसाइकिल स्थिति | सक्रिय | सक्रिय |
| फ़ंक्शन | 1 LVTTL input to 4 LVDS output repeater / fanout buffer | — |
| डेटा दर | 400 Mbps | — |
| Max Clock Frequency | 400 MHz | — |
| सप्लाई वोल्टेज | 3 V to 3.6 V (typical 3.3 V) | [DATA_NEEDED: VBAT operating range] |
| Input Type | LVTTL (single-ended) | — |
| आउटपुट प्रकार | LVDS (differential), 4 pairs | — |
| Output Voltage (typical) | 350 mV into 100 ohm load | — |
| Standard Compliance | ANSI EIA/TIA-644 LVDS | — |
| चैनल | 1 x 1:4 | — |
| पैकेज | 16-TSSOP (PW) | — |
| माउंटिंग प्रकार | Surface Mount | Surface Mount (reflow) |
| Technology | LVDS differential signaling | — |
| श्रेणी | Signal Buffers, Repeaters, Splitters - Clock Buffer | — |
| ऑपरेटिंग तापमान | [DATA_NEEDED: operating temperature range] | -40C to +85C |
| क्वाइसेंट करंट | [DATA_NEEDED: quiescent current] | — |
| Input Rise/Fall Time Note | TTL/CMOS rise/fall < 500 ps may require low-Dk laminate per TI layout guidance | — |
| Product Type | — | Sigfox-certified RF transceiver module |
| Manufacturer | — | TD next (Telecom Design) |
| RF Protocol | — | Sigfox (Ultra-Narrow-Band LPWAN) |
| Operating Frequency (RC1) | — | 868 MHz (ETSI Europe) |
| Operating Frequency (RC2) | — | 902-928 MHz (US, Australia, Japan) |
| Tx Power (RC1) | — | +14 dBm typical |
| Tx Power (RC2) | — | +22 dBm maximum |
| Receiver Sensitivity | — | [DATA_NEEDED: receiver sensitivity] |
| Integrated Microcontroller | — | ARM Cortex-M0+ (STM32 family) |
| Clock Reference | — | Integrated TCXO |
| Host Interface | — | UART, SPI, I2C, GPIO |
| Modulation | — | Ultra-Narrow-Band (UNB), DBPSK uplink |
| Maximum Payload Size | — | 12 bytes per uplink message |
| Form Factor | — | Surface-mount LGA castellation module |
| RoHS स्थिति | — | Compliant |