SN65LVDS105PWR vs TD1205 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng SN65LVDS105PWR sa pamamagitan ng Texas Instruments at TD1205 sa pamamagitan ng TD next. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Texas Instruments
SN65LVDS105PWR - 1:4 LVDS Clock Fanout Buffer 400Mbps | TI
SN65LVDS105PWR ✓ Nakahanda
Pagsanggunian na paghahambing
| Parametro | SN65LVDS105PWR | TD1205 |
|---|---|---|
| Brand | Texas Instruments | TD next |
| Kategorya | Clock & Timing | RF Modules |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Fungsi | 1 LVTTL input to 4 LVDS output repeater / fanout buffer | — |
| Rate ng Data | 400 Mbps | — |
| Max Clock Frequency | 400 MHz | — |
| Volte ng Pagbibigay | 3 V to 3.6 V (typical 3.3 V) | [DATA_NEEDED: VBAT operating range] |
| Input Type | LVTTL (single-ended) | — |
| Type ng Output | LVDS (differential), 4 pairs | — |
| Output Voltage (typical) | 350 mV into 100 ohm load | — |
| Standard Compliance | ANSI EIA/TIA-644 LVDS | — |
| Mga Channels | 1 x 1:4 | — |
| Packhaging | 16-TSSOP (PW) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (reflow) |
| Technology | LVDS differential signaling | — |
| Kategorya | Signal Buffers, Repeaters, Splitters - Clock Buffer | — |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | -40C to +85C |
| Kuru-kuryente ng Kapayapaan | [DATA_NEEDED: quiescent current] | — |
| Input Rise/Fall Time Note | TTL/CMOS rise/fall < 500 ps may require low-Dk laminate per TI layout guidance | — |
| Product Type | — | Sigfox-certified RF transceiver module |
| Manufacturer | — | TD next (Telecom Design) |
| RF Protocol | — | Sigfox (Ultra-Narrow-Band LPWAN) |
| Operating Frequency (RC1) | — | 868 MHz (ETSI Europe) |
| Operating Frequency (RC2) | — | 902-928 MHz (US, Australia, Japan) |
| Tx Power (RC1) | — | +14 dBm typical |
| Tx Power (RC2) | — | +22 dBm maximum |
| Receiver Sensitivity | — | [DATA_NEEDED: receiver sensitivity] |
| Integrated Microcontroller | — | ARM Cortex-M0+ (STM32 family) |
| Clock Reference | — | Integrated TCXO |
| Host Interface | — | UART, SPI, I2C, GPIO |
| Modulation | — | Ultra-Narrow-Band (UNB), DBPSK uplink |
| Maximum Payload Size | — | 12 bytes per uplink message |
| Form Factor | — | Surface-mount LGA castellation module |
| Tindminan RoHS | — | Compliant |