EP1SGX25FF1020I6N vs EP1SGX25FF1020I7 Perbandingan

Perbandingan bersamaan detil EP1SGX25FF1020I6N dari Altera dan EP1SGX25FF1020I7 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EP1SGX25FF1020I6N EP1SGX25FF1020I7
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Manufacturer Altera (Intel) —
Series Stratix GX EP1SGX25
Family Stratix GX FPGA Stratix GX
Logic Elements (LE) 25,660 —
Number of LABs/CLBs 2,566 —
Total RAM Bits 1,944,576 —
User I/O Count 607 —
Supply Voltage - Core 1.425 V to 1.575 V —
Suhu Kerja -40 °C to +100 °C (Industrial) —
Tipe Mounting Surface Mount Surface Mount (FC-FBGA)
Paket / Case 1020-BBGA, FCBGA —
Supplier Device Package 1020-FBGA (33x33) —
Speed Grade 6 7 (highest production grade)
Process Node 0.13 µm —
Embedded Transceivers Stratix GX multi-gigabit transceivers (MGTs) Yes (Stratix GX feature)
Status RoHS [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance]
Logic Cells — 25,660
Configurable Logic Blocks (CLBs) — 2,566
Process Technology — 130 nm CMOS
Core Supply Voltage — 1.5 V
Paket — FC-FBGA-1020 (Flip-Chip Fine-pitch BGA)
Number of Terminals / Balls — 1020
Terminal Form — Ball
Temperature Grade (suffix 'I') — Industrial
Terminal Pitch — [DATA_NEEDED: terminal pitch]
Combinatorial Delay per CLB — 9.48 ns (per Microchip USA listing)
Combinatorial Delay Variant — [DATA_NEEDED: tPD per CLB variant speed grade]
Maximum Internal Clock Frequency — [DATA_NEEDED: max Fmax in MHz per speed grade]
Configuration Method — SRAM-based (volatile, requires configuration at power-up)
Level MSL — [DATA_NEEDED: MSL level]

Spek dan Sumber

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