EP2A25F672C7N vs EP2A25F672C9N Perbandingan

Perbandingan bersamaan detil EP2A25F672C7N dari Altera dan EP2A25F672C9N dari Intel. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EP2A25F672C7N EP2A25F672C9N
Merek Altera Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family APEX II APEX II
Logic Elements 24,320 cells —
System Gates Approximately 900,000 Approx. 900000
User I/Os 492 —
Propagation Delay (tPD) 1.69 ns —
Internal Operating Frequency Up to 500 MHz —
Core Voltage (VCCINT) 1.5 V —
Process Technology 0.15 µm all-layer copper (up to 8 metal layers) 0.15 µm all-layer copper, up to 8 metal layers
Logic Family CMOS CMOS
Package Type 672-ball FC-FBGA (FineLine BGA) —
Package Body Size 27 x 27 mm —
Ball Pitch 1.0 mm —
Suhu Kerja 0 °C to 85 °C (commercial) 0 °C to +85 °C (commercial, C9 grade)
High-Speed I/O Support True-LVDS, LVPECL, PCML, HyperTransport up to 1 Gbps —
Programmable Logic Type Loadable PLD (in-system programmable) —
Embedded Memory Embedded System Blocks (ESB) configurable as dual-port RAM/ROM Enhanced System Blocks (ESBs) for dual-port RAM
PLLs Up to 4 —
Tipe Mounting Surface Mount Surface Mount (BGA)
Status RoHS [DATA_NEEDED: RoHS compliance] Compliant (per distributor listings)
Logic Elements / Cells — 24320
Maximum User I/O — 492
Operating Frequency — 236 MHz
Core Supply Voltage (VCCINT) — 1.425 V to 1.575 V (nominal 1.5 V)
Paket — 672-ball FineLine BGA (F672), 27 × 27 mm, 1.00 mm pitch
Seated Height (max) — 2.100 mm
Propagation Delay — 2.23 ns
I/O Standards Supported — LVTTL, LVCMOS, PCI, GTL+, SSTL-2/3, LVDS, LVPECL, PCML, HyperTransport
LVDS Data Rate — Up to 1 Gbps (True-LVDS)
Configuration Interface — Serial / Parallel PROM, JTAG, passive parallel (enhanced)
Design Software — Quartus II (v5.1 or later)

Spek dan Sumber

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