EPM9400RC208-20 vs EPM9320RC208-20 Perbandingan

Perbandingan bersamaan detil EPM9400RC208-20 dari Altera dan EPM9320RC208-20 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EPM9400RC208-20 EPM9320RC208-20
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family MAX 9000 MAX 9000
Programmable Type In System Programmable (ISP) —
Macro Cells 400 —
Usable Gates 8,000 6,000
Pin-to-Pin Propagation Delay 20 ns —
Maximum Operating Frequency 100 MHz —
Supply Voltage (Internal) 4.75 V to 5.25 V —
Configuration Technology EEPROM-based (non-volatile) —
JTAG Interface IEEE Std. 1149.1 —
Paket 208-pin RQFP (28x28 mm) 208-RQFP, exposed pad (208-BFQFP)
Supplier Device Package 208-RQFP —
Tipe Mounting Surface Mount Surface Mount
Suhu Kerja [DATA_NEEDED: operating temperature range] 0 °C to 70 °C (commercial)
Number of I/O Pins [DATA_NEEDED: user I/O count] —
Status RoHS [DATA_NEEDED: RoHS compliance] —
Level MSL [DATA_NEEDED: moisture sensitivity level] —
Speed Grade -20 (20 ns) —
Device Type — CPLD (Complex Programmable Logic Device)
Macrocells — 320
Logic Array Blocks (LABs) — 20
Maximum I/O Pins — 132
Propagation Delay (tPD max) — 20 ns
Supply Voltage (VCCINT) — 4.75 V to 5.25 V
Programming Technology — EEPROM, in-system programmable (ISP)
Boundary-Scan Interface — IEEE Std. 1149.1 (JTAG)
Architecture — Multiple Array Matrix (MAX), 3rd generation
Process Technology — CMOS, 5.0 V EEPROM
Reprogrammability — Yes, unlimited ISP cycles

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