EPM9560WC208-20 vs EPM9560WC208 Perbandingan

Perbandingan bersamaan detil EPM9560WC208-20 dari Altera dan EPM9560WC208 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EPM9560WC208-20 EPM9560WC208
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete NRND
Family MAX 9000 MAX 9000
Device Type CPLD (EPLD) EE Programmable Logic Device (CPLD)
Macrocells 560 560
Logic Array Blocks (LABs) 35 35
User I/O Pins 149 —
Maximum Propagation Delay (tPD) 23.6 ns —
Paket PQFP-208 (RQFP/WQFP) 208-pin CQFP (Ceramic Quad Flat Pack)
Process Technology CMOS, EEPROM-based CMOS, electrically erasable
Supply Voltage (VCCINT) 5 V (typical, see datasheet) —
I/O Voltage (VCCIO) 3.3 V or 5 V (multi-voltage I/O) —
In-System Programmability Yes, JTAG BST (IEEE 1149.1) —
Pin/Package Suffix W = power PQFP; -20 = 23.6 ns speed grade —
Suhu Kerja Commercial (0C to +70C) [DATA_NEEDED: exact temp grade] —
Tipe Mounting Surface Mount Surface Mount
Status RoHS Non-compliant (legacy PQFP) [DATA_NEEDED: confirm from official doc] [DATA_NEEDED: RoHS compliance]
Lead-Free [DATA_NEEDED] —
Bebas Halogen [DATA_NEEDED] —
Level MSL [DATA_NEEDED] [DATA_NEEDED: MSL level]
Flip-Flops — 772
Maximum User I/O — 149
Frekuensi Bawah Maximum — 117.6 MHz
Propagation Delay (tpd, -15 grade) — 16.6 ns
Tegangan Pemuat — 3.3 V or 5 V
Terminal Pitch — 0.50 mm
Programming Interface — IEEE 1149.1 JTAG
Configuration Memory — Non-volatile EE (instant-on)
Hot Socketing Support — Yes

Spek dan Sumber

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