SN74HC165PW - 8-Bit Parallel-Load Shift Register | Texas Instruments
部品番号: SN74HC165PW ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $0.55 | $0.55 |
| 10 | $0.48 | $4.80 |
| 100 | $0.34 | $34.00 |
| 500 | $0.26 | $130.00 |
| 1,000 | $0.22 | $220.00 |
SN74HC165PW 概要
A parallel-load shift register is a sequential logic device that captures multi-bit data simultaneously and then releases that data one bit per clock cycle on a serial output. These devices fall under the hierarchy of digital logic ICs -> shift registers -> parallel-in/serial-out (PISO) converters -> signal conditioning and I/O expansion. They are essential building blocks in the broader landscape of CMOS logic, including counters, multiplexers, and decoders, where GPIO counts are limited but multiple input signals must be read efficiently by a microcontroller.
Key features include gated clock inputs (CLK and CLK INHIBIT), a serial-in (SER) input for cascading, direct overriding parallel data inputs (A through H), and CMOS-compatible low-power consumption with 80 µA maximum ICC. The device is also specified for a typical propagation delay of around 13 ns at 5 V and tolerates 10 LSTTL loads, giving significant drive margin. Its TSSOP-16 footprint is a popular surface-mount choice for compact designs.
Typical applications include expanding microcontroller input ports for reading multiple pushbuttons, keypad scanning, DIP-switch polling, and reading multi-channel sensor arrays (e.g., 8-channel temperature or switch-contact inputs) using only two or three GPIO pins. The wide operating voltage and CMOS-friendly thresholds make it useful in 3.3 V and 5 V mixed-signal boards.
When designing with the SN74HC165PW, debounce mechanical inputs at the source or via software filtering because the shift register has no built-in debounce. The complementary outputs (QH and QH-bar) are useful for differential signalling or chained-shift cascading across multiple devices without extra glue logic.
ドロップイン代替品: SN74HC165PW — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: SN74HC165PW （同一形状・フットプリント） — 相違点: Function, Logic Family, Output Type, Package, RoHS Status.
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SN74HC165PWR
✅ ドロップイン✓ 在庫あり
$0.14 / 個
データシートを見る →SN74HC165PWT
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SN74HC165PW-Q1
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
74HC165PW
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74HC165PW-Q100
✅ ドロップイン📋 参考代替品（カタログ未掲載）
M74HC165TTR
✅ ドロップイン📋 参考代替品（カタログ未掲載）
SN74HC165PW 最大定格＆電気的特性
| Logic Type | Shift Register (Parallel-Load) |
| Number of Elements | 1 |
| Number of Bits per Element | 8 |
| 機能 | Parallel-to-Serial (PISO) and Serial-In/Serial-Out (SISO) |
| Logic Family | 74HC |
| VCC Supply Voltage Range | 2 V to 6 V |
| 出力タイプ | Complementary (QH and QH-bar) |
| Output Drive | ±4 mA at 5 V |
| Maximum ICC | 80 µA |
| Maximum Input Current | 1 µA |
| Typical Propagation Delay (tpd) | 13 ns at 5 V |
| LSTTL Load Capability | 10 loads |
| Clock Inputs | CLK and CLK INHIBIT (gated) |
| 動作温度範囲 | -40 °C to +85 °C |
| パッケージ | 16-TSSOP (PW) |
| 実装タイプ | Surface Mount |
| RoHS ステータス | Compliant |
SN74HC165PW ピン構成
| ピン 1 | SH/LD-bar — Shift/Load input (active-low parallel load) |
| ピン 2 | CLK — Clock input (rising-edge triggered) |
| ピン 3 | A — Parallel data input A |
| ピン 4 | B — Parallel data input B |
| ピン 5 | C — Parallel data input C |
| ピン 6 | D — Parallel data input D |
| ピン 7 | E — Parallel data input E |
| ピン 8 | GND — Ground |
| ピン 9 | F — Parallel data input F |
| ピン 10 | G — Parallel data input G |
| ピン 11 | H — Parallel data input H |
| ピン 12 | SER — Serial data input (for cascading) |
| ピン 13 | CLK INH — Clock inhibit (active-high disables CLK) |
| ピン 14 | QH — Serial data output |
| ピン 15 | QH-bar — Complementary serial data output |
| ピン 16 | VCC — Supply voltage (2 V to 6 V) |
主な用途
SN74HC165PW の用途: 6 件s: Microcontroller GPIO Expansion (Input), Keypad and Button Matrix Scanning, DIP Switch and Configuration Input Polling, Industrial Sensor Array Reading, LED Display and Indicator Multiplexing Input, Automotive Input Multiplexing.
Microcontroller GPIO Expansion (Input)
The SN74HC165PW expands a microcontroller's input capability by reading up to 8 digital inputs through just 3 GPIO pins (CLK, SH/LD-bar, QH). Per the TI datasheet, the device captures all 8 parallel inputs simultaneously when SH/LD-bar goes low, then shifts them out serially on subsequent CLK pulses. The 80 µA maximum ICC and 2-6 V VCC range allow it to operate efficiently from typical 3.3 V or 5 V microcontroller rails. Compared to matrix scanning techniques, the parallel-load approach requires no scanning firmware and reads all bits in a single burst, simplifying software. QH and QH-bar complementary outputs also enable interrupt-driven input monitoring without polling.
おすすめ
Keypad and Button Matrix Scanning
The SN74HC165PW reads mechanical key matrices by loading all row/column states in parallel and clocking them out serially. According to the TI datasheet, the SH/LD-bar pulse captures switch states, and the 13 ns propagation delay at 5 V enables fast response even with multiple cascaded devices. The CMOS inputs accept dry-contact closures with proper pull-up resistors, while the ±4 mA QH output drives a microcontroller input directly. Software debounce should be added in firmware, as the SN74HC165PW has no built-in debounce; pair it with RC filters or external Schmitt-trigger buffers for noisy mechanical switches.
おすすめ
DIP Switch and Configuration Input Polling
The SN74HC165PW reads multi-position DIP switches and configuration jumpers with minimal microcontroller pin usage. Per the TI datasheet, each of the 8 inputs (A-H) tolerates CMOS input levels with 1 µA maximum input current, making them ideal for slow-changing configuration settings. The serial output requires only one microcontroller pin to read 8 switch positions, freeing GPIO for other functions. The TSSOP-16 footprint suits compact front-panel and backplane PCBs. Cascading two SN74HC165PW chips enables 16-bit configuration words for complex equipment settings without dedicated I/O expander ICs.
おすすめ
Industrial Sensor Array Reading
The SN74HC165PW digitizes arrays of digital sensors such as photo-interrupters, limit switches, proximity sensors, and optocoupler outputs. According to the TI SN74HC165 datasheet, the wide 2-6 V VCC range lets it accept both 3.3 V and 5 V sensor signals with CMOS thresholds, while the ±4 mA output drive permits direct connection to industrial PLC and microcontroller inputs. The complementary QH/QH-bar outputs enable differential signalling over long factory-floor cables, reducing common-mode noise pickup. Operating temperature of -40 °C to +85 °C suits industrial enclosures without requiring extended-temperature parts.
おすすめ
LED Display and Indicator Multiplexing Input
The SN74HC165PW reads the state of LED column/row drivers in a multiplexed display, supporting return-path feedback for fault detection. Per the TI datasheet, the 8-bit parallel load captures column driver status in a single CLK cycle, and the gated CLK INHIBIT pin allows synchronization to display refresh timing. This diagnostic capability helps detect stuck LEDs, broken traces, or driver failures in commercial signage and instrument panels. Cascading multiple SN74HC165PW devices extends fault monitoring across large display arrays without dedicated MCU pins.
おすすめ
Automotive Input Multiplexing
For automotive designs requiring AEC-Q100 qualification, the 74HC165PW-Q100 from Nexperia offers identical TSSOP-16 footprint and pinout while adding automotive reliability screening. According to the Nexperia datasheet, the 74HC165PW-Q100 reads up to 8 digital inputs in vehicle body controllers, instrument clusters, and HVAC modules. The wide VCC range tolerates automotive 12 V battery transients via pre-regulation, and the -40 °C to +125 °C automotive temperature range suits under-hood and cabin applications. For non-automotive variants, the standard TI SN74HC165PW is the lower-cost option with the same electrical characteristics.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: SN74HC165PW — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | SN74HC165PWR | SN74HC165PWT | 74HC165PW | 74HC165PW-Q100 | M74HC165TTR |
|---|---|---|---|---|---|---|
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Nexperia | Nexperia | STMicroelectronics |
| Package | 16-TSSOP (PW) | 16-TSSOP (PW) - same | 16-TSSOP (PW) - same | 16-TSSOP (PW) - same | 16-TSSOP (PW) - same | 16-TSSOP (PW) - same |
| Logic Family | 74HC | 74HC | 74HC | 74HC | 74HC | 74HC |
| VCC Range | 2 V to 6 V | 2 V to 6 V | 2 V to 6 V | 2 V to 6 V | 2 V to 6 V | 2 V to 6 V |
| Bits per Element | 8 | 8 | 8 | 8 | 8 | 8 |
| Output Drive | ±4 mA at 5 V | ±4 mA at 5 V | ±4 mA at 5 V | ±4 mA at 5 V | ±4 mA at 5 V | ±4 mA at 5 V |
| AEC-Q100 Automotive | No | No | No | No | Yes | No |
| Operating Temperature | -40 °C to +85 °C | -40 °C to +85 °C | -40 °C to +85 °C | -40 °C to +125 °C | -40 °C to +125 °C (AEC-Q100) | -55 °C to +125 °C |
| Packaging | Tube | Tape & Reel | Small Reel | Tube | Tube / Reel | Tape & Reel |
主な差別化要因
- Cross-brand drop-in compatible with Nexperia 74HC165PW （vs 74HC165PW (Nexperia))
- Complementary QH/QH-bar outputs eliminate need for external inverter （vs SN74HC164D (shift register without complementary output))
- Parallel-load capability simplifies multi-input reading firmware （vs SN74HC164 (serial-only input shift register))
- Wide 2-6 V VCC range supports 3.3 V and 5 V designs （vs SN74LS165 (TTL-only))
設計ノート
The SN74HC165PW has no built-in debounce on its parallel inputs. When reading mechanical switches or relay contacts, debounce at the source with RC filters + Schmitt-trigger buffers (e.g., SN74HC14) or apply software debouncing in firmware by sampling each bit multiple times. Per the TI datasheet, the part responds to any logic-level transition within its 13 ns propagation delay, which means contact bounce will produce multiple spurious state changes if not filtered.
Place 0.1 µF decoupling capacitor as close as possible to the VCC pin (pin 16) and a bulk capacitor on the supply rail. The TSSOP-16 package has limited thermal dissipation but logic ICs generate minimal heat, so standard PCB layout guidelines suffice. Keep CLK and SH/LD-bar traces short and away from noisy switching lines to prevent ground-bounce-induced false triggering on the parallel load input.
When cascading multiple SN74HC165PW devices for wider shift registers, add a small RC delay (e.g., 100 Ω series resistor + 33 pF to ground) between QH of one device and SER of the next to prevent ringing on long traces. The complementary QH/QH-bar outputs can be used to drive differential pairs for noise-immune cascading across PCBs, but ensure both lines have matched impedance and length.
Estimated: at 5 V VCC and idle (no clocking), one SN74HC165PW draws approximately 8 µA quiescent current. When clocking at maximum frequency with CMOS input transitions, average ICC rises to around 1-2 mA depending on load capacitance. For battery-powered designs, gate the clock and use the SH/LD-bar pulse only when needed to read inputs, keeping the device in standby most of the time. The 80 µA maximum ICC specification confirms low-power CMOS operation across the full 2-6 V VCC range.
コンプライアンス情報
RoHS and REACH compliant per TI product page. Lead-free TSSOP-16 package. The SN74HC165PW itself is not AEC-Q100 qualified; choose Nexperia 74HC165PW-Q100 for automotive designs.
