EPM5192GC-2 vs EPM5192GM 비교

다음의 상세 나란히 비교: EPM5192GC-2 제조: Altera 및 EPM5192GM 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EPM5192GC-2 EPM5192GM
브랜드 Altera Altera
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 Obsolete Obsolete
재고 상태 In Stock In Stock
단가 (USD) $92.00 $58.00
Family MAX 5000 —
Macrocells 192 —
Logic Array Blocks 16 (LABs of 16 macrocells each) —
Usable I/O Pins [DATA_NEEDED: exact user I/O count for PGA package] —
Propagation Delay (tPD) 12 ns typical (-2 grade) —
Counter Frequency 100 MHz minimum —
Supply Voltage (VCC) 5 V nominal —
Technology CMOS EPROM CMOS
Programmable Technology UV-erasable / one-time programmable —
Programming Toolchain Altera MAX+PLUS II —
Package Type Pin Grid Array (PGA), ceramic —
동작 온도 Commercial (0C to +70C) [DATA_NEEDED: commercial/industrial/military grade]
Speed Grade -2 —
RoHS 상태 Non-Compliant (ceramic PGA, lead-bearing per GlobalSpec listing) Non-compliant (contains lead in ceramic PGA)
실장 유형 Through-hole (PGA socket) Through-Hole (PGA)
Product Family — MAX 5000
Device Type — UV Erasable Programmable Logic Device (PLD)
Number of Macrocells — 192
Usable Gates — 3,750
Pin-to-Pin Delay (tPD) — 15 ns (fastest speed grade); 55 ns (this part)
Counter Frequency (fCNT) — up to 76.9 MHz
Propagation Delay (tPD, this part) — 55 ns
패키지 — CPGA-84 (Ceramic Pin Grid Array, 84 pins, windowed)
Erasure Method — UV (windowed ceramic package)
공급 전압 — [DATA_NEEDED: typical VCC range]
Maximum User I/O — [DATA_NEEDED: exact I/O count for CPGA-84]
Process Node — [DATA_NEEDED: CMOS process geometry]
Programming Interface — JTAG-compatible (per MAX 5000 family)

데이터시트 & 자료

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