CDK8307CILP64 vs CDK8307AILP64 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci CDK8307CILP64 disebabkan oleh MaxLinear dan CDK8307AILP64 disebabkan oleh MaxLinear. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr CDK8307CILP64 CDK8307AILP64
Merek MaxLinear MaxLinear
Kategori ADC/DAC ADC/DAC
Status Lingkungan Hidup Aktif Aktif
Pemecahkatan 12/13-bit (selectable) 12/13-bit (selectable)
Sample Rate 65 MSPS maximum (20/40/50/65 MSPS grades) —
Number of Channels 8 (simultaneous sampling) 8 (simultaneous sampling)
Digital Output Interface Serial LVDS —
Input Type Differential analog inputs —
Reference Internal (integrated bandgap) Internal reference (integrated)
Control Interface SPI-compatible serial Serial programming interface (SPI-style)
Kemasan 64-pin LQFP (LP64) 64-pin QFN (ILP64)
Architecture Proprietary pipeline ADC Pipelined ADC with proprietary core
Power Profile Ultra-low power (per-channel) —
Gambaran Suhu Operasi [DATA_NEEDED: operating temperature range] [DATA_NEEDED: temperature range]
Supply Voltage (AVDD) [DATA_NEEDED: AVDD nominal] —
Supply Voltage (DRVDD/LVDS) [DATA_NEEDED: DRVDD nominal] —
ENOB [DATA_NEEDED: effective number of bits] —
SNR [DATA_NEEDED: signal-to-noise ratio] —
SFDR [DATA_NEEDED: spurious-free dynamic range] —
Status RoHS Compliant (per MaxLinear product page) Compliant
Jenis Pemasangan Surface Mount Surface Mount
Sample Rate Range — 20 / 40 / 50 / 65 / 80 MSPS
Output Interface — Serial LVDS
Tegangan Pemberi Arus — [DATA_NEEDED: supply voltage]
Power Dissipation (Typ) — Ultra-low power (per-channel shutdown)
Shutdown Modes — Per-channel + full-chip idle (via external pin)
FPGA Compatibility — Designed to interface with major FPGA vendors
Original Brand — Cadeka / Exar (now MaxLinear)

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