CDK8307CILP64 vs CDK8307AILP64 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng CDK8307CILP64 sa pamamagitan ng MaxLinear at CDK8307AILP64 sa pamamagitan ng MaxLinear. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
MaxLinear
CDK8307CILP64 - 12/13-bit 65MSPS Octal ADC, LVDS Output | MaxLinear
CDK8307CILP64 ✓ NakahandaMaxLinear
CDK8307AILP64 - 12/13-bit Octal Ultra-Low Power LVDS ADC | MaxLinear
CDK8307AILP64 ✓ NakahandaPagsanggunian na paghahambing
| Parametro | CDK8307CILP64 | CDK8307AILP64 |
|---|---|---|
| Brand | MaxLinear | MaxLinear |
| Kategorya | ADC/DAC | ADC/DAC |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Pangangasiwaan | 12/13-bit (selectable) | 12/13-bit (selectable) |
| Sample Rate | 65 MSPS maximum (20/40/50/65 MSPS grades) | — |
| Number of Channels | 8 (simultaneous sampling) | 8 (simultaneous sampling) |
| Digital Output Interface | Serial LVDS | — |
| Input Type | Differential analog inputs | — |
| Reference | Internal (integrated bandgap) | Internal reference (integrated) |
| Control Interface | SPI-compatible serial | Serial programming interface (SPI-style) |
| Packhaging | 64-pin LQFP (LP64) | 64-pin QFN (ILP64) |
| Architecture | Proprietary pipeline ADC | Pipelined ADC with proprietary core |
| Power Profile | Ultra-low power (per-channel) | — |
| Hanay ng Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: temperature range] |
| Supply Voltage (AVDD) | [DATA_NEEDED: AVDD nominal] | — |
| Supply Voltage (DRVDD/LVDS) | [DATA_NEEDED: DRVDD nominal] | — |
| ENOB | [DATA_NEEDED: effective number of bits] | — |
| SNR | [DATA_NEEDED: signal-to-noise ratio] | — |
| SFDR | [DATA_NEEDED: spurious-free dynamic range] | — |
| Tindminan RoHS | Compliant (per MaxLinear product page) | Compliant |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Sample Rate Range | — | 20 / 40 / 50 / 65 / 80 MSPS |
| Output Interface | — | Serial LVDS |
| Volte ng Pagbibigay | — | [DATA_NEEDED: supply voltage] |
| Power Dissipation (Typ) | — | Ultra-low power (per-channel shutdown) |
| Shutdown Modes | — | Per-channel + full-chip idle (via external pin) |
| FPGA Compatibility | — | Designed to interface with major FPGA vendors |
| Original Brand | — | Cadeka / Exar (now MaxLinear) |