EP910DM-40 vs EP910DM883B Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP910DM-40 disebabkan oleh Altera dan EP910DM883B disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EP910DM-40 | EP910DM883B |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Product Type | UV Erasable Programmable Logic Device (EPLD) | — |
| Family | Altera Classic EP910 | Classic EPLD - EP910 Series |
| Architecture | PAL-type AND/OR with global programmable interconnect bus | PAL-type AND-OR-NOT, CMOS |
| Macrocells | 24 | 24 |
| Dedicated Inputs | 36 | — |
| Dedicated Outputs | 24 | — |
| Bidirectional I/O Lines | 24 | — |
| Product Terms | 240 | 240 |
| Propagation Delay (tPD) | 40 ns | 40 ns (typical) |
| External Clocks | 2 | — |
| Process Technology | CMOS | — |
| Kemasan | 40-pin Ceramic DIP (Cerdip) with UV window | CDIP-40 (Ceramic DIP, 40-pin) |
| Jenis Pemasangan | Through-Hole (DIP) | Through-Hole (DIP) |
| Suhu Operasi | [DATA_NEEDED: operating temperature range] | -55 °C to +125 °C (military) |
| Tegangan Pemberi Arus | 5 V | — |
| Status RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Programming Interface | JEDEC-standard fuse-map / UV erasure | — |
| Manufacturer | — | Altera (now part of Intel) |
| Device Type | — | Erasable Programmable Logic Device (EPLD) |
| Inputs | — | 36 |
| Outputs | — | 24 |
| Frekuensi Klock Maksimum | — | 25 MHz |
| Supply Voltage (VCC) | — | 5 V |
| Programming Voltage (VPP) | — | 12.5 V (UV-erase window) |
| MIL Processing | — | MIL-STD-883B Class B |
| Configuration Memory | — | UV-erasable EPROM |
| Logic Elements | — | Combinational + Registered |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |