EP910DM-40 vs EP910DM883B 对比

详细并排对比 EP910DM-40 出自 Altera 和 EP910DM883B 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP910DM-40 EP910DM883B
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $21.00 $7.10
Product Type UV Erasable Programmable Logic Device (EPLD) —
Family Altera Classic EP910 Classic EPLD - EP910 Series
Architecture PAL-type AND/OR with global programmable interconnect bus PAL-type AND-OR-NOT, CMOS
Macrocells 24 24
Dedicated Inputs 36 —
Dedicated Outputs 24 —
Bidirectional I/O Lines 24 —
Product Terms 240 240
Propagation Delay (tPD) 40 ns 40 ns (typical)
External Clocks 2 —
Process Technology CMOS —
封装 40-pin Ceramic DIP (Cerdip) with UV window CDIP-40 (Ceramic DIP, 40-pin)
安装类型 Through-Hole (DIP) Through-Hole (DIP)
工作温度 [DATA_NEEDED: operating temperature range] -55 °C to +125 °C (military)
电源电压 5 V —
RoHS 状态 [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status]
Programming Interface JEDEC-standard fuse-map / UV erasure —
Manufacturer — Altera (now part of Intel)
Device Type — Erasable Programmable Logic Device (EPLD)
Inputs — 36
Outputs — 24
最大时钟频率 — 25 MHz
Supply Voltage (VCC) — 5 V
Programming Voltage (VPP) — 12.5 V (UV-erase window)
MIL Processing — MIL-STD-883B Class B
Configuration Memory — UV-erasable EPROM
Logic Elements — Combinational + Registered
Lead-Free — [DATA_NEEDED: lead-free status]

数据手册与资源

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