EPM5064JC vs EPM5032JC25 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM5064JC disebabkan oleh Altera dan EPM5032JC25 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EPM5064JC | EPM5032JC25 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (Erasable PLD) | — |
| Macrocells | 64 | — |
| Usable Gates | 1,250 (approx.) | — |
| Logic Array Inputs | 36 | — |
| Logic Array Outputs | 64 | — |
| Kemasan | 68-pin PLCC (JEDEC) | 28-pin PLCC (JC) |
| Jenis Pemasangan | Surface Mount (socketed) | Surface Mount |
| Supply Voltage (VCC) | 5 V (typical, 4.75 V - 5.25 V range) | — |
| I/O Logic Level | TTL / CMOS compatible | — |
| Configuration Memory | EPROM (UV-erasable window or OTP) | — |
| Suhu Operasi | [DATA_NEEDED: operating temperature grade] | — |
| Pin-to-Pin Delay (tPD) | [DATA_NEEDED: specific tPD grade value] | — |
| Maximum Frequency (fMAX) | [DATA_NEEDED: fCNT grade value] | — |
| Status RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Aras MSL | [DATA_NEEDED: MSL rating] | — |
| Programming Tool | Altera MAX+PLUS II / Quartus II (legacy device support) | — |
| Device | — | EPM5032 |
| Logic Elements | — | 32 macrocells |
| Propagation Delay (tPD) | — | 25 ns |
| Maximum Internal Frequency | — | 62.5 MHz |
| Product Terms | — | 320 |
| Flip-Flops | — | 32 |
| Dedicated Inputs | — | 7 |
| Bidirectional I/O Pins | — | 16 |
| Total Inputs to Array | — | 24 |
| Bilangan Output | — | 16 |
| Architecture | — | PAL-type macrocells with global Programmable Interconnect Array (PIA) |
| Technology | — | CMOS EPROM, UV-erasable (windowed) / OTP |
| Tegangan Pemberi Arus | — | 5 V (TTL-level I/O) |