EPM5192JC-ES vs EPM5192JC Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM5192JC-ES disebabkan oleh Intel dan EPM5192JC disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM5192JC-ES EPM5192JC
Merek Intel Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Device Family MAX 5000 —
Device Type CPLD (EPLD) —
Macrocells 192 192
Logic Array Blocks (LABs) 12 12
Interconnect Programmable Interconnect Array (PIA) —
Configuration Memory EPROM (UV-erasable, one-time programmable for JC-ES) —
Kemasan 84-pin PLCC (J-lead, CQCC, JEDEC S-CQCC-J84) 68-pin PLCC (JC) windowed ceramic
Jenis Pemasangan Surface Mount Surface Mount
Technology CMOS —
Programming Altera MAX+PLUS II or compatible programmer —
Suhu Operasi [DATA_NEEDED: operating temperature range for ES grade] [DATA_NEEDED: commercial / industrial / military grade]
Tegangan Pemberi Arus [DATA_NEEDED: VCC nominal] [DATA_NEEDED: VCC nominal]
User I/O Pins [DATA_NEEDED: user I/O count for JC-ES in PLCC-84] —
Status RoHS [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: original Altera marking not RoHS]
Lead-Free [DATA_NEEDED: lead-free status] —
Aras MSL [DATA_NEEDED: MSL rating] —
Note Datasheet source: Altera MAX 5000 family document, 52 pages —
Product Type — CPLD (Complex Programmable Logic Device)
Series — EPM5192 (Classic / MAX-class)
Interconnect Architecture — Programmable Interconnect Array (PIA)
Process Technology — CMOS EPROM (UV-erasable)
Programming Method — UV-erase + EPROM programmer
Non-Volatile Configuration — Yes (EPROM cell array)
Logic Family — Classic CPLD (EPM5xxx series)
Propagation Delay — [DATA_NEEDED: tpd spec by speed grade]

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