EPM5192JC-ES vs EPM5192JC Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192JC-ES sa pamamagitan ng Intel at EPM5192JC sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPM5192JC-ES EPM5192JC
Brand Intel Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Device Family MAX 5000 —
Device Type CPLD (EPLD) —
Macrocells 192 192
Logic Array Blocks (LABs) 12 12
Interconnect Programmable Interconnect Array (PIA) —
Configuration Memory EPROM (UV-erasable, one-time programmable for JC-ES) —
Packhaging 84-pin PLCC (J-lead, CQCC, JEDEC S-CQCC-J84) 68-pin PLCC (JC) windowed ceramic
Uri ng Pagpapasok Surface Mount Surface Mount
Technology CMOS —
Programming Altera MAX+PLUS II or compatible programmer —
Temperature na Operasyon [DATA_NEEDED: operating temperature range for ES grade] [DATA_NEEDED: commercial / industrial / military grade]
Volte ng Pagbibigay [DATA_NEEDED: VCC nominal] [DATA_NEEDED: VCC nominal]
User I/O Pins [DATA_NEEDED: user I/O count for JC-ES in PLCC-84] —
Tindminan RoHS [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: original Altera marking not RoHS]
Lead-Free [DATA_NEEDED: lead-free status] —
Level ng MSL [DATA_NEEDED: MSL rating] —
Note Datasheet source: Altera MAX 5000 family document, 52 pages —
Product Type — CPLD (Complex Programmable Logic Device)
Series — EPM5192 (Classic / MAX-class)
Interconnect Architecture — Programmable Interconnect Array (PIA)
Process Technology — CMOS EPROM (UV-erasable)
Programming Method — UV-erase + EPROM programmer
Non-Volatile Configuration — Yes (EPROM cell array)
Logic Family — Classic CPLD (EPM5xxx series)
Propagation Delay — [DATA_NEEDED: tpd spec by speed grade]

Mga Datasheets at Resources

Tingnan ang Lahat ng mga Produkto Lumikha ng BOM Hilingin ang Kita