EPM5192JC2 vs EPM5192JC1 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM5192JC2 disebabkan oleh Intel dan EPM5192JC1 disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EPM5192JC2 | EPM5192JC1 |
|---|---|---|
| Merek | Intel | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 (MAX 5xxx CPLD) |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 192 | — |
| Logic Array Blocks (LABs) | 12 | — |
| Usable Gates (equivalent) | 6000 | — |
| Maximum User I/O | 64 | — |
| Dedicated Inputs | 7 | — |
| External Clock Inputs | 1 (with shared input/clock capability) | — |
| Frekuensi Klock Maksimum | 50 MHz | — |
| Propagation Delay (tPD) | 45 ns (speed grade -2) | — |
| Process Technology | CMOS, UV-erasable | 0.5 µm CMOS, UV-erasable EPROM |
| Interconnect | Programmable Interconnect Array (PIA) | — |
| Kemasan | PLCC-68 (JC) | [DATA_NEEDED: exact package from datasheet] |
| Jenis Pemasangan | Surface Mount (socketable PLCC) | [DATA_NEEDED: surface mount or through-hole] |
| Programming | Altera Master Programmer / ByteBlaster via JTAG-style interface | — |
| Manufacturer | — | Intel (formerly Altera Corporation) |
| Macro Cells | — | 192 |
| Usable Gates | — | 3750 |
| Maximum Operating Frequency | — | 62.5 MHz |
| Supply Voltage (VCC) | — | 5 V (nominal) |
| Propagation Delay (typ) | — | [DATA_NEEDED: propagation delay in ns] |
| I/O Pins | — | [DATA_NEEDED: I/O pin count] |
| Suhu Operasi | — | [DATA_NEEDED: operating temp range] |
| Programming Interface | — | JTAG-compatible (Altera MAX 5xxx) |
| Logic Blocks (LABs) | — | 24 (8 macrocells per LAB) |
| Status RoHS | — | unknown |
| AEC-Q100 | — | not_applicable |
| Lifecycle | — | Obsolete - last-time-buy stock only at franchised distributors |