AM6528 Sitara MPU Dual Cortex-A53 + R5F 1.1GHz | TI
MPN: AM6528 β Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $18.75 | $18.75 |
| 10 | $17.5 | $175.00 |
| 100 | $16.2 | $1,620.00 |
| 500 | $15.1 | $7,550.00 |
| 1,000 | $14 | $14,000.00 |
Drop-in alternatives for AM6528 β same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool β Select alternative parts for side-by-side comparison:
AM6526
β Drop-Inπ Reference alternative (not in catalog)
AM6546
β Drop-Inπ Reference alternative (not in catalog)
AM6548
β Drop-Inπ Reference alternative (not in catalog)
AM6528 Maximum Ratings & Electrical Characteristics
| Core Processor | Arm Cortex-A53 |
| Number of A53 Cores | 2 |
| Real-Time Cores | 2x Arm Cortex-R5F |
| Maximum A53 Clock Rate | 1.1 GHz |
| R5F Clock Rate | 400 MHz |
| Architecture | 32-Bit / 64-Bit Arm |
| Accelerator | 3D graphics (SGX544), Gigabit PRU-ICSS |
| Product Family | Sitara Processors |
| Silicon Revision | 2.1 |
| Package | 784-FCBGA (23x23 mm) |
| Mounting Type | Surface Mount |
| Supplier Device Package | 784-FCBGA |
| Operating Temperature | [DATA_NEEDED: operating temperature range] |
| Supply Voltage | [DATA_NEEDED: core supply voltage] |
| Memory Interface | [DATA_NEEDED: DDR memory type] |
| RoHS Status | Compliant |
| Industrial Ethernet | Gigabit PRU-ICSS (EtherCAT, PROFINET capable via software stacks) |
AM6528 Pin Configuration
| Pin Ball map per SPRSP52C | [DATA_NEEDED: full 784-ball map] β The complete 784-FCBGA ball map spans power domains, DDR4, GPMC, Ethernet, PRU-ICSS, and peripherals; see TI datasheet SPRSP52C and TI PinMux tool |
Safe Operating Area (SOA) & Thermal Characteristics
No official SOA curve available for this digital IC. Always operate within absolute maximum ratings specified in the datasheet. Ensure adequate cooling and derate as needed.
Typical Applications
AM6528 is suitable for 6 applications: Industrial HMI Panels, Industrial Ethernet Gateways, PLC and Motor Drive Control, Edge Computing and IoT Gateways, Building and Factory Automation Controllers, Medical Instrumentation Control.
Industrial HMI Panels
The AM6528 fits industrial HMI panels because its integrated 3D GPU renders rich graphical interfaces while dual Cortex-A53 cores at 1.1 GHz run Linux-based GUI frameworks. The dual Cortex-R5F cores at 400 MHz simultaneously handle machine I/O scanning. Typical designs pair the processor with DDR4 memory and capacitive touch controllers, achieving responsive panel performance without a separate graphics processor.
Recommended
Industrial Ethernet Gateways
The Gigabit PRU-ICSS makes the AM6528 ideal for protocol-conversion gateways, hardware-offloading EtherCAT, PROFINET, and EtherNet/IP while the A53 cores run protocol translation software. TI notes the family supports industrial communication stacks and up to 5 Gigabit Ethernet ports. This deterministic offload delivers consistent cycle times that software-only stacks cannot guarantee on general-purpose cores.
Recommended
PLC and Motor Drive Control
In PLCs and motor drives, the AM6528's lockstep-capable Cortex-R5F cores execute deterministic control loops at 400 MHz while the A53 cluster manages communication, diagnostics, and HMI. The Gigabit PRU-ICSS provides hardware-assisted industrial Ethernet for drive synchronization. TI markets the AM65x family directly at Industry 4.0 embedded products, making this a reference platform choice.
Recommended
Edge Computing and IoT Gateways
The AM6528 serves edge computing gateways by combining Linux-class Cortex-A53 processing for data aggregation and analytics with real-time R5F cores for sensor acquisition. The 784-FCBGA package integrates DDR4, GPMC, and multiple Ethernet interfaces, reducing BOM count. Designs typically run Debian or Yocto-based Processor SDK with containerized edge applications from TI's software ecosystem.
Recommended
Building and Factory Automation Controllers
Building and factory automation controllers benefit from the AM6528's balance of connectivity and real-time control. Dual A53 cores run BACnet/Modbus TCP stacks and local web dashboards, while R5F cores manage deterministic I/O cycles. The Gigabit PRU-ICSS supports additional industrial protocols, and 3D graphics enable dashboard visualization directly on the controller's local display.
Recommended
Medical Instrumentation Control
Medical instrumentation control boards use the AM6528 where a Linux user interface (touchscreen HMI via 3D GPU) coexists with deterministic sample sequencing on Cortex-R5F cores. Long-life Sitara availability suits multi-year medical product cycles, and the PRU-ICSS can implement custom real-time sensor buses. Typical designs pair the processor with precision ADCs for acquisition front-ends.
Recommended
Recommended Products Summary
Engineering reference data for AM6528 β comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | AM6526 | AM6546 | AM6548 | AM6442 |
|---|---|---|---|---|---|
| Package | 784-FCBGA (23x23 mm) | 784-FCBGA (23x23 mm) | 784-FCBGA (23x23 mm) | 784-FCBGA (23x23 mm) | ALX FCBGA (18x18 mm) - different |
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| A53 Core Count | 2 | 2 | 4 | 4 | 2 |
| Max A53 Frequency | 1.1 GHz | [DATA_NEEDED] | 1.4 GHz | 1.4 GHz | 1.0 GHz |
| Cortex-R5F Cores | 2 at 400 MHz | 2 | 2 | 2 | 2 at 800 MHz |
| Gigabit PRU-ICSS | Yes | Yes (reduced ports) | Yes | Yes | Yes (integrated Ethernet switch) |
| 3D Graphics | Yes | No | Yes | Yes | No |
| Price (1 pc) | $18.75 | [DATA_NEEDED] | [DATA_NEEDED] | [DATA_NEEDED] | [DATA_NEEDED] |
Key Differentiators
- Lower cost dual-core option with 3D GPU (vs AM6548)
- Integrated 3D graphics (vs AM6526)
- Gigabit PRU-ICSS hardware protocol offload (vs AM6442)
Design Notes
The AM6528 requires multiple sequenced power domains (core, DDR, I/O). Use TI's reference PMIC solution, such as the TPS659039, or the discrete power tree from the AM65x GP EVM design. Follow TI's power sequencing requirements in datasheet SPRSP52C - incorrect sequencing of VDD_CORE versus DDR rails can prevent boot or damage the device.
The 784-FCBGA (23x23 mm) with fine ball pitch requires a minimum 6-layer PCB stackup with controlled-impedance DDR4 routing. Follow the AM65x EVM layout: length-match DDR4 byte lanes within tolerance, solid reference planes under high-speed balls, and via-in-pad or escape routing per IPC guidelines. Do not attempt 4-layer layouts for this package.
At 1.1 GHz dual-A53 active operation, the AM6528 dissipates several watts. Provide a thermal solution (heatsink or thermal vias to internal/bottom copper plane) sized using theta-JA data from SPRSP52C. Monitor junction temperature via the on-chip temperature sensor in software and implement DVFS throttling in the Linux kernel for fanless designs.
Compliance Information
RoHS compliant per TI product page. REACH and halogen-free status not stated in provided data.
