ATSAMA5D27C-LD2G-CU - SAMA5D2 SiP MPU, 500MHz Cortex-A5, 2Gb LPDDR2
MPN: ATSAMA5D27C-LD2G-CU ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $36.5 | $36.50 |
| 10 | $33.2 | $332.00 |
| 100 | $29.85 | $2,985.00 |
| 500 | $27.4 | $13,700.00 |
| 1,000 | $25.6 | $25,600.00 |
ATSAMA5D27C-LD2G-CU Overview
A microprocessor unit (MPU) is a class of processor that integrates a CPU core, memory controller, and a rich set of peripherals on a single silicon die, in contrast to a microcontroller (MCU) which typically embeds non-volatile memory on-die. The SAMA5D2 family belongs to the broader category of ARM Cortex-A application processors, which run a higher-level operating system (typically Linux) rather than a real-time executive. The SiP integration step further extends this hierarchy by co-packaging the DRAM die into the same substrate, reducing PCB complexity from 4-6 layers to 2-4 layers in typical designs.
Key features of the ATSAMA5D27C-LD2G-CU include the ARM Cortex-A5 core with NEON and Floating Point Unit, dual Ethernet GMAC with 1588 support, dual CAN-FD interfaces, an LCD controller with TFT/STN support up to WXGA resolution, hardware image sensor interface, embedded audio subsystem, peripheral touch controller, and a 0.8 mm ball pitch TFBGA package that simplifies PCB escape routing. Security features include secure boot, hardware cryptographic accelerators (AES, SHA, TRNG), and tamper detection pins.
The SiP architecture eliminates the high-speed parallel interface between MPU and external DRAM, which is the largest source of EMI and signal-integrity challenges in DDR-based designs. By placing 2 Gbit of LPDDR2 in the same package, the SAMA5D27C-LD2G-CU removes PCB stubs, reduces crosstalk, and frees the designer from DRAM placement and termination concerns. The 32-bit datapath delivers up to 3.2 GB/s peak memory bandwidth, sufficient for QVGA/WVGA graphical interfaces, streaming audio, and modest video decode workloads.
Typical applications include industrial HMI panels, smart home gateways, building automation controllers, low-cost Linux edge nodes, point-of-sale terminals, patient monitoring displays, and connected appliances. The wide operating temperature range (industrial -40C to +85C for the CU suffix) and long-life Microchip product commitment make it particularly attractive for embedded designs requiring 10+ year availability.
When designing with this SiP, follow the JEDEC JESD209-2 LPDDR2 layout guidelines, even though the DRAM is internal. Decoupling capacitor selection, regulator ramp sequencing, and the boot mode strapping remain critical. Software support includes the mainline Linux kernel (v4.9+), Buildroot and Yocto BSPs, and FreeRTOS for asymmetric multiprocessing with the optional Cortex-M4 system controller.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone.
Drop-in alternatives for ATSAMA5D27C-LD2G-CU — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with ATSAMA5D27C-LD2G-CU (same form factor and footprint) — differing in Package, Operating Temperature, Core Architecture, Ethernet, USB.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
ATSAMA5D27B-LD2G-CU
✅ Drop-In📋 Reference alternative (not in catalog)
ATSAMA5D27A-LD2G-CU
✅ Drop-In📋 Reference alternative (not in catalog)
ATSAMA5D27C-LD2G-CUR
✅ Drop-In✓ In Stock
$10.2 / Unit
View Datasheet →ATSAMA5D27C-LD1G-CU
✅ Drop-In✓ In Stock
$18.4 / Unit
View Datasheet →ATSAMA5D28C-LD2G-CU
✅ Drop-In✓ In Stock
$15.75 / Unit
View Datasheet →ATSAMA5D26C-LD2G-CU
✅ Drop-In📋 Reference alternative (not in catalog)
ATSAMA5D27C-LD2G-CU Maximum Ratings & Electrical Characteristics
| Core Architecture | ARM Cortex-A5 |
| Core Count | 1 |
| Data Bus Width | 32-bit |
| Maximum CPU Frequency | 500 MHz |
| Integrated Memory | 2 Gbit LPDDR2 SDRAM (SiP) |
| Package | 361-TFBGA (16x16 mm), 0.8 mm ball pitch |
| Mounting Type | Surface Mount |
| Operating Temperature | -40C to +85C (industrial, CU suffix) |
| Ethernet | Dual 10/100/1000 GMAC with 1588 |
| CAN | Dual CAN-FD |
| Display Controller | LCD TFT/STN up to WXGA |
| Image Sensor Interface | Yes (parallel ITU-R BT.656/1120) |
| Touch Controller | Peripheral Touch Controller (PTC) |
| USB | USB 2.0 Host + Device |
| Security | Secure boot, AES/SHA/TRNG, tamper pins |
| RoHS Status | Compliant |
| MSL Level | 3 |
ATSAMA5D27C-LD2G-CU 361-tfbga (16x16 mm), 0.8 mm ball pitch Pin Configuration Guide
Pin configuration for ATSAMA5D27C-LD2G-CU (361-tfbga (16x16 mm), 0.8 mm ball pitch package). This digital IC includes GPIO, communication interfaces (UART, SPI, I2C), and power pins. Refer to the manufacturer datasheet for alternate pin functions and configuration options. Essential for embedded system design and PCB layout.
No detailed pinout data available for ATSAMA5D27C-LD2G-CU.
Refer to the datasheet for full pin configuration.
Typical Applications
ATSAMA5D27C-LD2G-CU is suitable for 7 applications: Industrial Human-Machine Interface (HMI), Smart Home and Building Automation Gateway, Connected Medical Device Display, Point-of-Sale (POS) Terminal, Linux Edge IoT Node, Connected Appliance and White Goods, Low-Cost Streaming Audio / Smart Speaker.
Industrial Human-Machine Interface (HMI)
The ATSAMA5D27C-LD2G-CU is ideally suited for industrial HMI panels operating between 7-inch WVGA and 10-inch WXGA resolutions. Its integrated LCD controller supports 24-bit RGB and TFT interfaces up to 1280x800, while the embedded peripheral touch controller (PTC) drives projected capacitive or resistive touchscreens without an external controller. The 2 Gbit of LPDDR2 provides enough bandwidth for smooth Qt/Embedded graphical rendering at 60 fps. Paired with the dual Gigabit Ethernet ports, the MPU can simultaneously drive the display and stream data to a PLC or SCADA gateway over EtherCAT, PROFINET, or TCP/IP. The -40C to +85C industrial temperature grade makes the part suitable for factory-floor enclosures, and the secure-boot cryptographic accelerators protect against firmware tampering.
Recommended
Smart Home and Building Automation Gateway
In smart-home and building-automation gateways, the ATSAMA5D27C-LD2G-CU serves as the central Linux host that bridges IP-based protocols (Matter, Thread, Zigbee via external co-processor, KNX-IP) to legacy fieldbuses. The 500 MHz Cortex-A5 with NEON handles TLS 1.3 handshakes and JSON payload parsing at low latency, while the dual GMACs segment LAN from WAN traffic with IEEE 1588 hardware timestamping for sub-microsecond sync. The integrated 2 Gbit LPDDR2 leaves headroom for large rule-engine databases and OTA staging buffers. The low-power architecture lets the gateway drop to under 1 mW in retention while still waking on RTC or CAN-FD events, extending backup-battery runtime in alarm panels. Linux4SAM BSP with Buildroot produces a 50 MB rootfs that fits comfortably in attached QSPI flash.
Recommended
Connected Medical Device Display
The ATSAMA5D27C-LD2G-CU powers patient monitoring displays and diagnostic instrument front panels where clean rendering of waveforms, vital signs, and user interfaces must coexist with strict regulatory constraints. The hardware AES/SHA accelerators and secure-boot chain enable IEC 62443-style device identity and firmware signing, while the embedded audio subsystem drives speaker/microphone interfaces for clinician voice prompts. The 2 Gbit LPDDR2 stores one or more waveform history buffers (up to 30 seconds at 1 kHz sample) without external memory. The peripheral touch controller supports gloved-touch capacitive sensors required in clinical environments, and the parallel image sensor interface can attach a low-cost CMOS camera for barcode-scanning medication labels. Note that this is a non-AEC-Q100 part; medical IEC 60601-1 compliance must be validated at the system level.
Recommended
Point-of-Sale (POS) Terminal
For point-of-sale terminals, the ATSAMA5D27C-LD2G-CU delivers the right balance of graphical horsepower, connectivity, and security. The 500 MHz Cortex-A5 runs a Linux-based payment application stack (e.g. Chromium for HTML5 POS UIs), while the integrated LPDDR2 keeps latency low for QR-code decode and EMV chip-card transactions. Dual CAN-FD or RS-485 ports support connection to receipt printers, cash drawers, and barcode scanners without external transceivers. Secure boot with hardware TRNG, AES-256, and SHA-256 protects PIN-entry and TLS certificate storage. The compact 16x16 mm TFBGA footprint keeps the PCB small enough for handheld mPOS form factors, and the industrial -40C to +85C grade survives cold-store checkout lanes and outdoor kiosk deployments.
Recommended
Linux Edge IoT Node
In Linux edge IoT nodes, the ATSAMA5D27C-LD2G-CU acts as a small-footprint gateway that aggregates sensor data, runs local analytics (TinyML/TensorFlow Lite), and publishes to cloud brokers over MQTT or CoAP. The Cortex-A5 with NEON accelerates lightweight ML inference on the 2 Gbit LPDDR2 backing store, and the peripheral touch controller + LCD interface enables on-device visualization of sensor trends. Dual CAN-FD interfaces natively connect to industrial sensor buses (CANopen, J1939), while the USB 2.0 host port accommodates 4G/LTE or LoRaWAN dongles. Linux4SAM with Buildroot delivers a 30-80 MB image, and Yocto LTS layers enable long-term CVE patching. The MPU's deep-sleep retention under 1 mW lets solar- or battery-powered edge nodes last years on a single charge.
Recommended
Connected Appliance and White Goods
The ATSAMA5D27C-LD2G-CU is well-suited as the main control MPU in connected appliances such as smart ovens, washer-dryer user-interface boards, and HVAC thermostats. The 500 MHz Cortex-A5 runs a Qt-based UI for animated controls, the integrated LCD controller drives a 5-7 inch TFT, and the peripheral touch controller reads capacitive buttons directly through the glass overlay. Dual CAN-FD interfaces connect to inverter boards and motor controllers, while the embedded audio subsystem plays voice prompts and alarm tones. The 2 Gbit LPDDR2 retains user presets, scheduling data, and OTA update staging. Microchip's 10-year longevity commitment makes this SiP a low-risk choice for consumer-appliance SKUs that must remain in production for many years.
Recommended
Low-Cost Streaming Audio / Smart Speaker
In low-cost streaming-audio devices and smart speakers, the ATSAMA5D27C-LD2G-CU provides Linux-based protocol handling (Alexa Voice Service, Google Assistant, AirPlay 2) plus local audio mixing. The embedded audio subsystem includes two I2S interfaces for stereo DAC/amplifier paths and a PDM input for microphone arrays. The 2 Gbit LPDDR2 accommodates audio buffer queues, voice wake-word model weights, and OTA image staging. The Cortex-A5's NEON engine speeds up Opus and AAC codec operations, and the Ethernet/Wi-Fi interface paths deliver sub-100 ms streaming latency. Hardware AES decryption accelerates DRM license handling for protected streaming services.
Recommended
Recommended Products Summary
Engineering reference data for ATSAMA5D27C-LD2G-CU — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | ATSAMA5D27B-LD2G-CU | ATSAMA5D27A-LD2G-CU | ATSAMA5D27C-LD1G-CU | ATSAMA5D28C-LD2G-CU | ATSAMA5D26C-LD2G-CU |
|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 361-TFBGA (16x16 mm, 0.8 mm pitch) | 361-TFBGA (16x16 mm) - same | 361-TFBGA (16x16 mm) - same | 361-TFBGA (16x16 mm) - same | 361-TFBGA (16x16 mm) - same | 361-TFBGA (16x16 mm) - same |
| Core | Cortex-A5 single core | Cortex-A5 single core | Cortex-A5 single core | Cortex-A5 single core | Cortex-A5 dual core | Cortex-A5 single core |
| Maximum CPU Frequency | 500 MHz | 500 MHz | 500 MHz | 500 MHz | 500 MHz (per core) | 500 MHz |
| Integrated DRAM | 2 Gbit LPDDR2 | 2 Gbit LPDDR2 | 2 Gbit LPDDR2 | 1 Gbit LPDDR2 (-50%) | 2 Gbit LPDDR2 | 2 Gbit LPDDR2 |
| LCD Controller | Yes (up to WXGA) | Yes | Yes | Yes | Yes | No |
| Image Sensor Interface | Yes | Yes | Yes | Yes | Yes | No |
| Operating Temperature | -40C to +85C (CU suffix) | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C |
| Unit Price (qty 1, USD, as of 2026-09-21) | 36.50 | 35.20 | 33.40 | 31.85 | 44.10 | 30.20 |
Key Differentiators
- Latest die revision C with all silicon errata fixes (vs ATSAMA5D27B-LD2G-CU)
- Dual-core upgrade available in identical footprint (vs ATSAMA5D28C-LD2G-CU)
- Lower-cost option for memory-light designs (vs ATSAMA5D27C-LD1G-CU)
Design Notes
The ATSAMA5D27C-LD2G-CU SiP dissipates approximately 250-300 mW at 500 MHz with both GMACs active. Estimate: a 4-layer PCB with 4 thermal vias under the package center and 1 square inch of inner-plane copper keeps junction-to-ambient thermal resistance theta_JA around 25 C/W, yielding a 7-8 C rise above ambient - well within the 85 C industrial ceiling. Avoid routing the inner planes as ground-return-only; dedicate at least one solid plane to thermal spreading. For fanless enclosures above 60 C ambient, derate CPU frequency to 333 MHz to stay within thermal budget.
Although the LPDDR2 is internal to the SiP, follow JEDEC JESD209-2 decoupling guidelines: place 100 nF X7R capacitors on every VDDVARIO and VDDCORE pin pair within 1 mm of the BGA ball, plus four 4.7 uF bulk capacitors near the package corners. Use 0.5 mm via-in-pad with epoxy-filled and plated-over copper capping (VIPPO) on all 361 balls to maximize routing density. Maintain a continuous reference plane on layers 2 and (N-1) to control the impedance of the high-speed QSPI and GMAC traces.
The ATSAMA5D27C-LD2G-CU requires three power rails: VDDVARIO (1.8 V or 3.3 V depending on peripherals), VDDCORE (1.2 V typical), and VDDBU (1.2 V backup for RTC/RAM retention). Power sequencing must follow the datasheet order: VDDBU ramps first, then VDDVARIO, then VDDCORE - violations may trigger latch-up. Use the MIC2800 or MCP1650 multi-rail PMIC for a compact solution, or discrete LDOs if the design already has a 5 V intermediate rail. Estimate: peak current on VDDCORE is 250 mA at 500 MHz - select an LDO with at least 400 mA rating for margin.
Do not enable boot from SD card (BMS pin) without first validating that the boot image signature matches the secure-boot public-key hash stored in OTP fuses - otherwise the part refuses to boot and appears dead. Also note that the Cortex-A5 NEON engine must be explicitly enabled in kernel configuration; many distributions ship with it off for power savings, which silently reduces DSP throughput by 50%. Finally, the LPDDR2 calibration registers are factory-tuned; do not attempt manual re-calibration without the Microchip DDR calibration tool.
Route the JTAG/SWD debug signals (TCK, TMS, TDI, TDO, NRST) as a length-matched group with 50 ohm single-ended impedance, kept under 50 mm total length, and isolated from GMAC and USB differential pairs by at least 3W spacing. The BOOT_MODE and BMS boot-mode strapping pins must be pulled to known states with 10 kohm resistors; floating boot pins cause intermittent boot failures that look like software crashes. Leave accessible test pads on the SD card signals for factory diagnostics.
Compliance Information
Per Microchip product page and DigiKey listing, the ATSAMA5D27C-LD2G-CU is RoHS compliant, lead-free, and halogen-free. The SAMA5D2 family is NOT AEC-Q100 qualified; for automotive applications Microchip recommends the SAM V71/V70 or SAMA7G54 families. The long-term longevity program (10+ years) covers this part.
