DSPIC33EP128GM310-H/PF - 70 MIPS 16-bit DSC, TQFP-100 | Microchip
MPN: DSPIC33EP128GM310-H/PF ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $7.2 | $7.20 |
| 10 | $6.55 | $65.50 |
| 100 | $5.85 | $585.00 |
| 500 | $5.3 | $2,650.00 |
| 1,000 | $4.75 | $4,750.00 |
DSPIC33EP128GM310-H/PF Overview
A digital signal controller combines the computational strengths of a microcontroller with the math acceleration of a digital signal processor. In the power-management hierarchy of embedded systems, the dsPIC33E family sits above basic MCUs by adding a Harvard-architecture DSP engine, single-cycle MAC, and hardware divide, making it a direct fit for control loops that need both deterministic logic and fast arithmetic.
Key features include the 70 MIPS dsPIC DSC core, 128 KB (43K x 24) of flash program memory, 16 KB of RAM, an 8-channel input capture / 8-channel output compare block, 2 quadrature encoder interfaces (QEI), and 4 integrated operational amplifiers for direct current-shunt and sensor signal conditioning. The 12-bit motor-control ADC resources enable high-resolution current sampling in FOC and field-oriented motor drives.
Architecturally, the GM3 device integrates enhanced peripherals with Peripheral Pin Select (PPS), allowing remapping of digital peripherals onto flexible RPn/RPIn pins, which simplifies PCB routing in dense automotive boards. The DSP engine supports single-cycle MAC and dual operand fetch for efficient filter and transform execution.
Typical applications include precision brushless DC and PMSM motor control, automotive body and powertrain subsystems, digital power conversion, and industrial automation requiring sensor fusion and fast control loops.
Design consideration: at 70 MIPS the core requires careful decoupling of all VDD/VSS pairs and a clean 3.3V rail; the -H temperature/quality suffix variant must be matched to the project's qualification and environmental requirements.
This page synthesizes distributor pricing, drop-in family alternatives, and practical design notes not consolidated in the manufacturer datasheet.
Drop-in alternatives for DSPIC33EP128GM310-H/PF — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with DSPIC33EP128GM310-H/PF (same form factor and footprint) — differing in Quadrature Encoder Interfaces, Package, Core Architecture, Core Processor, Flash Program Memory.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
DSPIC33EP128GM310-I/PF
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
DSPIC33EP256GM310-H/PF
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$4.45 / Unit
View Datasheet →DSPIC33EP64GM310-H/PF
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
DSPIC33EP128GM710-H/PF
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$4.9 / Unit
View Datasheet →DSPIC33EP128GM610-H/PF
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
DSPIC33EP128GM310-H/PF Maximum Ratings & Electrical Characteristics
| Core Processor | dsPIC33E 16-bit DSC core |
| Core Architecture | Harvard, dsPIC |
| Maximum Operating Frequency | 70 MIPS |
| Flash Program Memory | 128 KB (43K x 24) |
| RAM | 16 KB |
| Supply Voltage | 3.3 V |
| Data Bus Width | 16 bit |
| Input Capture Channels | 8 |
| Output Compare Channels | 8 |
| Quadrature Encoder Interfaces | 2 (QEI) |
| Integrated Op-Amps | 4 |
| Package | 100-TQFP (PF) |
| Mounting Type | Surface Mount |
| Qualification | AEC-Q100, Automotive |
| Series | dsPIC 33EP GM3 |
| Peripheral Pin Select | Yes (PPS, RPn/RPIn remapping) |
DSPIC33EP128GM310-H/PF 100-tqfp (pf) Pin Configuration Guide
Pin configuration for DSPIC33EP128GM310-H/PF (100-tqfp (pf) package). This digital IC includes GPIO, communication interfaces (UART, SPI, I2C), and power pins. Refer to the manufacturer datasheet for alternate pin functions and configuration options. Essential for embedded system design and PCB layout.
No detailed pinout data available for DSPIC33EP128GM310-H/PF.
Refer to the datasheet for full pin configuration.
Typical Applications
DSPIC33EP128GM310-H/PF is suitable for 6 applications: Precision Motor Control (BLDC/PMSM), Automotive Body and Powertrain Electronics, Digital Power Conversion, Industrial Automation and Sensing, Audio Signal Processing, Battery Management and Smart Charging.
Precision Motor Control (BLDC/PMSM)
The DSPIC33EP128GM310-H/PF is purpose-built for precision motor control: its 70 MIPS dsPIC33E core executes field-oriented control (FOC) algorithms with single-cycle MAC operations, while 2 quadrature encoder interfaces decode position feedback from incremental encoders without software overhead. The 4 integrated op-amps condition current-shunt signals directly, reducing external component count and analog noise pickup. The 8 output compare channels drive the three-phase inverter PWM with complementary outputs and dead-time control. In a typical PMSM drive, the 12-bit ADC samples phase currents synchronously with PWM triggers, closing current loops in the tens of microseconds. The AEC-Q100 qualification makes it viable for automotive traction-adjacent and pump/fan motor systems.
Recommended
Automotive Body and Powertrain Electronics
With AEC-Q100 qualification, the DSPIC33EP128GM310-H/PF addresses automotive body-control and powertrain auxiliary functions such as throttle actuators, headlamp leveling, window lifters, and pump control. The 128 KB flash accommodates firmware stacks including LIN/CAN communication plus control logic, and Peripheral Pin Select (PPS) lets designers remap UART, SPI, and PWM functions across the 85+ I/O to fit existing connector pinouts without PCB respins. The 3.3 V supply integrates cleanly with automotive 5 V rails via simple regulators, and the -H grade suffix supports the quality/temperature requirements of under-hood-adjacent zones. Multiple PGECx/PGEDx pairs provide flexible in-circuit programming access during production flashing.
Recommended
Digital Power Conversion
In digital power supplies, PFC stages, and DC-DC converters, the DSPIC33EP128GM310-H/PF's 70 MIPS core provides the loop bandwidth needed for voltage-mode and current-mode control at switching frequencies of 100 kHz to several hundred kHz. The synchronized ADC sampling triggered by PWM events minimizes switching-noise corruption of current readings, and the 8 output compare channels generate phase-shifted or interleaved PWM with fine duty resolution. On-chip op-amps can buffer current-sense signals ahead of the ADC, saving an external amplifier stage. Software libraries from Microchip's digital power ecosystem provide ready-made compensator and state-machine frameworks, shortening development time for server power and telecom rectifier designs.
Recommended
Industrial Automation and Sensing
For factory automation nodes - sensor hubs, actuator controllers, and small PLCs - the DSPIC33EP128GM310-H/PF combines 8 input capture channels for precise event timing with abundant UART/SPI/I2C peripherals for Modbus, IO-Link-style, and sensor networks. The 4 op-amps front-end bridge and current sensors directly, while 16 KB RAM buffers sampling data for FFT-based vibration or signature analysis using the DSP engine's single-cycle MAC. Peripheral Pin Select simplifies adaptation to legacy fieldbus wiring, and 100 pins provide enough I/O for local relay, valve, and indicator control. The Harvard architecture keeps deterministic interrupt latency, important for real-time industrial timing requirements.
Recommended
Audio Signal Processing
The DSP engine of the DSPIC33EP128GM310-H/PF executes FIR/IIR filtering, FFT analysis, and audio effect algorithms efficiently thanks to single-cycle MAC and dual operand fetch. With 70 MIPS available, stereo 48 kHz processing with moderate filter counts is practical for automotive audio enhancement, active noise cancellation front-ends, and professional audio accessories. The 128 KB flash holds codec drivers plus DSP coefficient tables, and the 8 input captures support precise sample-clock and timing recovery. Integrated op-amps can serve as microphone preamp or line-level buffer stages, reducing the bill of materials. Communication peripherals stream audio data to/from external codecs over SPI or I2S-style serial links.
Recommended
Battery Management and Smart Charging
Battery-management and smart-charger designs benefit from the DSPIC33EP128GM310-H/PF's combination of precision analog integration and control throughput. The on-chip op-amps condition cell-voltage and current-shunt signals, while the 12-bit ADC with simultaneous multi-channel sampling supports per-cell monitoring and coulomb counting. Charging profiles (CC/CV, Li-ion multi-stage, lead-acid) run as state machines on the 70 MIPS core with headroom for safety algorithms including overcurrent, overtemperature, and cell-balancing logic. Multiple UART/SPI links report status to vehicle or host systems, and AEC-Q100 qualification allows use in automotive on-board chargers and 48 V mild-hybrid BMS auxiliary boards where traceable qualification matters.
Recommended
Recommended Products Summary
Engineering reference data for DSPIC33EP128GM310-H/PF — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | DSPIC33EP128GM310-I/PF | DSPIC33EP256GM310-H/PF | DSPIC33EP64GM310-H/PF | DSPIC33EP128GM710-H/PF |
|---|---|---|---|---|---|
| Package | TQFP-100 (PF) | TQFP-100 (PF) - same | TQFP-100 (PF) - same | TQFP-100 (PF) - same | TQFP-100 (PF) - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Core / MIPS | dsPIC33E, 70 MIPS | dsPIC33E, 70 MIPS | dsPIC33E, 70 MIPS | dsPIC33E, 70 MIPS | dsPIC33E, 70 MIPS |
| Flash Memory | 128 KB | 128 KB | 256 KB | 64 KB | 128 KB |
| RAM | 16 KB | 16 KB | 16 KB | 16 KB | 16 KB |
| Qualification Grade | AEC-Q100 Automotive (-H suffix) | Industrial (-I suffix) | AEC-Q100 Automotive (-H) | AEC-Q100 Automotive (-H) | AEC-Q100 Automotive (-H) |
Key Differentiators
- Integrated analog front-end (vs DSPIC33EP128GM610-H/PF)
- Automotive qualification at same cost tier (vs DSPIC33EP128GM310-I/PF)
- Upgrade path without respin (vs DSPIC33EP64GM310-H/PF)
Design Notes
Provide a clean, well-decoupled 3.3 V rail. Connect every VDD/VSS pin pair on the 100-pin TQFP - skipping a pair is a common cause of erratic operation and failed programming. Decouple each VDD pin with a 100 nF ceramic capacitor placed within 2 mm of the pin, plus bulk 10 uF capacitance near the device. Estimated: at 70 MIPS the core current is on the order of tens of mA plus I/O load, so a 500 mA regulator is typically sufficient, but verify against the current-versus-MIPS graphs in the manufacturer datasheet.
Use Peripheral Pin Select (PPS) in firmware to group high-speed signals (PWM outputs, encoder inputs) onto pins physically adjacent to their connector or driver stage, minimizing trace length and crosstalk. Reserve one PGECx/PGEDx pair as a header accessible from the board edge for ICSP programming; per Microchip guidance, the PGEC and PGED used must be a matched pair (e.g., PGEC2 with PGED2). Keep analog inputs and the integrated op-amp pins away from PWM switching traces and route over a solid ground plane.
Do not confuse the -H suffix with the more common -I (industrial) grade: the -H variant carries a different temperature/processing grade, and mixing suffixes on one BOM can break automotive traceability requirements. Also note flash is organized as 43K x 24 instruction words, not bytes - do not size firmware against a '128 KB byte' assumption. When substituting within the family, verify the peripheral pin map: GM610/GM710 variants differ from the GM310 in analog and PWM peripheral allocation even though the footprint is identical.
Compliance Information
AEC-Q100 automotive qualification per Hotenda and FindIC product data. RoHS/lead-free status per Microchip standard policy for current dsPIC33E production; REACH and halogen-free status not stated in verified sources.
