DSPIC33EV32GM106-E/MR - 16-Bit 70 MIPS DSC 32KB Flash | Microchip
MPN: DSPIC33EV32GM106-E/MR ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $5.6 | $5.60 |
| 10 | $5.1 | $51.00 |
| 100 | $4.6 | $460.00 |
| 500 | $4.2 | $2,100.00 |
| 1,000 | $3.85 | $3,850.00 |
DSPIC33EV32GM106-E/MR Overview
A digital signal controller combines the computational throughput of a digital signal processor with the peripheral integration and deterministic control of a microcontroller. Within the power-management hierarchy, the dsPIC33EV sits above basic MCUs and below standalone DSPs, making it a single-chip solution for closed-loop motor control, digital power conversion, and sensor-intensive embedded systems that must operate in electrically harsh environments.
Key differentiating features include native 5V operation that eliminates level-shifting in automotive and industrial 12V/24V systems, an extended temperature range of -40C to +125C on the E-grade suffix, CAN 2.0B and SENT interfaces for in-vehicle networking, six motor-control PWM channels with complementary outputs, and three on-chip operational amplifiers that offload external analog signal conditioning.
Architecturally, the dsPIC33EV core executes DSP-class instructions including DSP multiply-accumulate, division support, and a barrel shifter, backed by 4 DMA channels and 7 timers for deterministic real-time control. A Charge Time Measurement Unit (CTMU) enables capacitive touch and precision time-of-flight measurement. ECC Flash provides single-bit error detection and correction, supporting functional-safety-oriented designs. The part is listed in Microchip's AEC-Q100-qualified dsPIC33EV automotive series.
Typical applications include brushless DC and PMSM motor drives, automotive sensors and touch control units, appliance control boards, solenoid and valve drivers, and CAN-networked industrial nodes where the 5V I/O tolerance directly simplifies BOM and board design.
Design-wise, exploit the integrated op amps to build the current-sense front end for FOC motor control, but budget the PWM dead-time insertion registers carefully when driving bridge topologies at 60-70 MHz system speeds.
This page synthesizes verified distributor data, drop-in same-family alternatives, practical design notes, and AEO-optimized FAQs not found in the manufacturer datasheet alone.
Drop-in alternatives for DSPIC33EV32GM106-E/MR — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with DSPIC33EV32GM106-E/MR (same form factor and footprint) — differing in Operating Temperature, Package, RAM, Core Processor, Flash Memory.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
DSPIC33EV32GM106-I/MR
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$3.49 / Unit
View Datasheet →DSPIC33EV32GM106-H/MR
✅ Drop-In📋 Reference alternative (not in catalog)
DSPIC33EV256GM106T-I/MR
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$3.72 / Unit
View Datasheet →DSPIC33EV256GM106-I/MR
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
Contact for price
View Datasheet →DSPIC33EV32GM106-E/MR Maximum Ratings & Electrical Characteristics
| Core Processor | dsPIC33E (16-bit DSC) |
| Core Size | 16-bit |
| CPU Speed | 70 MIPS |
| Maximum System Frequency | 60 MHz (per distributor listing) |
| Flash Memory | 32 KB ECC Flash |
| RAM | 4 KB |
| Supply Voltage | 5 V |
| CAN Interface | CAN 2.0B |
| Motor Control PWM | 6 channels (MC PWM) |
| On-chip Op Amps | 3 |
| SENT Interface | Yes |
| CTMU | Charge Time Measurement Unit |
| DMA Channels | 4 |
| Timers | 7 |
| Operating Temperature | -40C to +125C (E grade) |
| Package | 64-pin QFN (S-PQCC-N64), 0.50 mm terminal pitch |
| Mounting Type | Surface Mount |
DSPIC33EV32GM106-E/MR 64-pin qfn (s-pqcc-n64), 0.50 mm terminal pitch Pin Configuration Guide
Pin configuration for DSPIC33EV32GM106-E/MR (64-pin qfn (s-pqcc-n64), 0.50 mm terminal pitch package). This digital IC includes GPIO, communication interfaces (UART, SPI, I2C), and power pins. Refer to the manufacturer datasheet for alternate pin functions and configuration options. Essential for embedded system design and PCB layout.
No detailed pinout data available for DSPIC33EV32GM106-E/MR.
Refer to the datasheet for full pin configuration.
Typical Applications
DSPIC33EV32GM106-E/MR is suitable for 6 applications: Brushless DC / PMSM Motor Drives, Automotive Sensors and Control Units, Appliance Control Boards, Digital Power Conversion (AC-DC / DC-DC), Industrial CAN Network Nodes, Solenoid and Valve Driver Control.
Brushless DC / PMSM Motor Drives
The DSPIC33EV32GM106-E/MR fits BLDC and PMSM motor control because its six motor-control PWM channels provide complementary outputs with programmable dead-time insertion, while the 70 MIPS 16-bit core executes field-oriented control (FOC) algorithms with DSP multiply-accumulate instructions in real time. The three on-chip operational amplifiers condition shunt-resistor current-sense signals without external op-amp ICs, reducing BOM cost and board area in the drive stage. In a typical FOC drive, the PWM module runs at 16-20 kHz switching frequency with ADC-triggered current sampling synchronized to the PWM center, so the loop executes once per PWM period. The 5V I/O directly drives optocoupler and gate-driver inputs common in industrial drives, and ECC Flash protects control firmware against single-bit memory faults in continuously running motors.
Recommended
Automotive Sensors and Control Units
This device targets automotive sensing nodes because the dsPIC33EV GM family is designed for harsh in-vehicle environments with noise and vibration, per the Microchip family overview. The CAN 2.0B controller connects the node to the vehicle bus, and SENT connectivity reads modern SENT-output sensors such as pressure, position, and Hall devices that increasingly replace analog outputs in 12V/24V systems. The E-grade -40C to +125C rating covers under-hood and transmission-mounted locations. The CTMU (Charge Time Measurement Unit) supports capacitive touch interfaces for control panels and precision time-of-flight measurements. Because the entire signal chain - sensor input via SENT, processing at 70 MIPS, and bus transmission via CAN - is integrated in one 64-pin QFN, the design eliminates external interface chips and benefits from the family's functional-safety positioning.
Recommended
Appliance Control Boards
Appliance controllers benefit directly from native 5V operation: household appliances combine 5V-tolerant sensors, triac/optocoupler drive signals, and noisy motor-generated transients, and the dsPIC33EV's robust 5V I/O structures interface these directly without level-shifting components. Typical uses include washing machine and dishwasher motor control, induction cooktop power regulation, and air-conditioner fan control, all of which the Microchip product page explicitly lists as target applications. The 32 KB ECC Flash is sufficient for state-machine-heavy appliance firmware, and the three op amps condition current feedback from compressor or pump motors. The CTMU enables capacitive-touch user interfaces on glass panels, replacing mechanical switches, while CRC/ECC features support safety-relevant functions in modern connected appliances.
Recommended
Digital Power Conversion (AC-DC / DC-DC)
Digital power supplies use the DSPIC33EV32GM106-E/MR as the loop controller because the 70 MIPS core and DSP MAC instructions execute voltage-mode or current-mode compensation laws with deterministic cycle times, and the high-resolution motor-control PWM can be repurposed for phase-shifted full-bridge, LLC, or buck topologies. The on-chip op amps serve as error amplifiers and current-sense buffers, while the 12-bit ADC samples output voltage and inductor current synchronized to PWM events. The 5V logic level matches the optocoupler and isolated-feedback ecosystem common in power designs. CAN support enables PMBus-like supervision and telemetry nodes in telecom rectifiers and server PSU environments, where the extended E-grade temperature rating tolerates the hot internal air near heat-generating magnetics.
Recommended
Industrial CAN Network Nodes
As a CAN-networked industrial node, this DSC combines local control intelligence with bus connectivity in a single chip. The integrated CAN 2.0B controller handles up to extended-frame messaging with hardware filtering, offloading the 70 MIPS CPU for application logic such as pump sequencing, valve timing, or conveyor coordination. Four DMA channels move CAN frames and ADC results without CPU intervention, keeping interrupt latency low for time-critical tasks, and the 7 timers support scheduler tick, input capture, and output-compare functions simultaneously. The 5V supply matches legacy industrial 24V control cabinets after simple regulation, and -40C to +125C operation covers unconditioned outdoor and machine-interior enclosures. ECC Flash maintains firmware integrity across years of continuous duty in electrically noisy factory floors.
Recommended
Solenoid and Valve Driver Control
Solenoid and proportional-valve control exploits the DSPIC33EV32GM106-E/MR's complementary PWM outputs to generate peak-and-hold drive profiles: full current for fast actuation followed by reduced PWM duty for holding without coil overheating. The three op amps condition low-side shunt current measurements, and the ADC synchronized to PWM captures current ripple for closed-loop current regulation at 70 MIPS - fast enough for high-frequency hydraulic and pneumatic valve loops. The CTMU can measure coil inductance-based position feedback in smart solenoids without extra hardware. CAN and SENT interfaces let the driver report diagnostics such as short-circuit, open-load, and over-temperature events to a vehicle or machine controller, which is a requirement in many automotive body and powertrain actuator designs.
Recommended
Recommended Products Summary
Engineering reference data for DSPIC33EV32GM106-E/MR — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | DSPIC33EV32GM106-I/MR | DSPIC33EV32GM106-H/MR | DSPIC33EV256GM106T-I/MR |
|---|---|---|---|---|
| Package | 64-pin QFN (S-PQCC-N64), 0.50 mm pitch | 64-pin QFN (MR) - same | 64-pin QFN (S-PQCC-N64) - same | 64-pin QFN (MR) - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Flash Memory | 32 KB ECC Flash | 32 KB ECC Flash | 32 KB ECC Flash | 256 KB ECC Flash |
| RAM | 4 KB | 4 KB | 4 KB | 4 KB |
| CPU Speed | 70 MIPS | 70 MIPS | 70 MIPS | 70 MIPS |
| Operating Temperature | -40C to +125C (E grade) | -40C to +85C (I grade) | H grade (extended high temp) | -40C to +85C (I grade) |
| Peripherals (CAN / MC PWM / Op Amps / SENT / CTMU) | CAN 2.0B, 6 MC PWM, 3 op amps, SENT, CTMU | Identical set | Identical set | Identical set |
| DMA Channels / Timers | 4 DMA / 7 timers | 4 / 7 | 4 / 7 | 4 / 7 |
Key Differentiators
- Native 5V operation with extended temperature rating (vs DSPIC33EV32GM106-I/MR)
- ECC Flash for functional-safety-oriented designs (vs DSPIC33FJ64MC706A-E/PT)
- 8x code headroom without PCB change (vs DSPIC33EV256GM106T-I/MR)
Design Notes
The 64-pin QFN (S-PQCC-N64) has a 0.50 mm terminal pitch and an exposed thermal pad on the underside. Design the land pattern per the Microchip datasheet recommended footprint, with the center pad tied to a grid of vias (typically 4x4) to a ground plane for thermal relief and signal return. Reserve the ICSP pins (MCLR, PGD, PGC) with a standard programming header and keep series resistors on programming lines low enough not to block in-circuit debug. Because many digital peripherals are remappable via Peripheral Pin Select, finalize the PPS assignment before routing to minimize crossunders.
Native 5V operation is an advantage, but in 12V/24V automotive and industrial systems the local 5V rail must tolerate load dump and transients. Place a 0.1 uF ceramic decoupling capacitor at each VDD/VSS pair plus a bulk 10 uF capacitor, and consider a TVS and ferrite bead on the board-level 5V input. The E-grade part is rated to +125C ambient-adjacent conditions; verify the actual junction temperature using the package theta-JA from the datasheet (Estimated: always compute Tj = Ta + Pd x theta-JA with your measured supply current before finalizing the thermal design).
Three pitfalls recur in dsPIC33EV designs. First, analog pins used for the on-chip op amps and ADC must be configured as digital I/O disabled (ANSEL cleared) at startup, or readings will be corrupted. Second, ECC Flash adds wait-state behavior - do not assume zero-cycle execution timing identical to non-ECC dsPIC33F parts when porting cycle-exact motor control code; re-run timing validation at 70 MIPS. Third, the CAN controller needs an external CAN transceiver (e.g., MCP2551-class part) - it cannot drive the bus directly. Confirm all three against the Microchip family datasheet during schematic review.
The three on-chip op amps provide convenient gain stages for current-sense shunts, but their inputs route through internal analog switches to package pins that also function as general I/O. Route shunt and filter traces as short Kelvin connections directly to the dedicated analog pins, guard them with ground pour, and keep PWM or CAN routing away from the analog corner of the 64-pin QFN. This preserves the op-amp offset and ADC accuracy assumed by FOC and power-conversion algorithms.
Compliance Information
Octopart comparison data lists the dsPIC33EV series under Microchip's Automotive, AEC-Q100 functional-safety portfolio. RoHS/REACH/lead-free status per the official Microchip product page should be confirmed at time of order.
