DSPIC33FJ32GP102T-I/ML - 16-Bit 16 MIPS DSC 32KB Flash | Microchip
MPN: DSPIC33FJ32GP102T-I/ML ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $3.32 | $3.32 |
| 10 | $3.1 | $31.00 |
| 100 | $2.85 | $285.00 |
| 500 | $2.55 | $1,275.00 |
| 1,000 | $2.3 | $2,300.00 |
| 3,000 | $2.15 | $6,450.00 |
DSPIC33FJ32GP102T-I/ML Overview
A digital signal controller combines the compute architecture of a microcontroller with DSP-grade math capability. In the product hierarchy, the dsPIC33F sits between general-purpose MCUs and dedicated DSPs: it executes a modified Harvard, 16-bit instruction-word/24-bit data-word pipeline with hardware DSP multiply-accumulate (MAC) instructions, making it a single-chip solution for motor control, digital power, and signal conditioning where both control logic and fast math are needed.
Key differentiating features include the 40-bit accumulator DSP engine with single-cycle MAC, hardware division support, 16 MIPS sustained throughput, and the Peripheral Pin Select (PPS) scheme that lets designers remap digital peripherals to available I/O pins - a major advantage in pin-limited 28-pin packages. On-chip peripherals include UART, SPI, and I2C ports, input capture/output compare channels, a high-speed 10-bit ADC, and an on-chip regulator requiring only a single external capacitor on the VCAP pin.
Architecturally, the dsPIC33F core runs from an internal fast RC oscillator or external crystal/PLL combinations, providing flexible clock generation up to the rated MIPS ceiling. In-Circuit Serial Programming (ICSP) and in-circuit debugging are supported via just two I/O pins plus reset, compatible with low-cost tools such as MPLAB SNAP, PICkit 3/4, and ICD 3/4.
Typical applications include sensorless and brushed DC motor control, digital power supplies (LLC, PFC), electronic lighting ballasts, and general-purpose embedded control that benefits from DSP math for filtering.
Design consideration: the internal regulator requires a 4.7 uF to 10 uF, 16V low-ESR capacitor on VCAP; this pin must never be tied to VDD, a frequent root cause of non-startup in new layouts.
This page consolidates distributor pricing, drop-in family alternatives, and practical design notes not found in the manufacturer datasheet.
Drop-in alternatives for DSPIC33FJ32GP102T-I/ML — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with DSPIC33FJ32GP102T-I/ML (same form factor and footprint) — differing in Operating Temperature, Package, Packaging, RAM, Supply Voltage.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
DSPIC33FJ32GP102-I/ML
✅ Drop-In✓ In Stock
$3.48 / Unit
View Datasheet →DSPIC33FJ32GP102T-E/ML
✅ Drop-In📋 Reference alternative (not in catalog)
DSPIC33FJ32GP102-I/ML
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$3.48 / Unit
View Datasheet →DSPIC33FJ16GP102-I/ML
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
DSPIC33FJ64GP102-I/ML
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
DSPIC33FJ32GP102T-I/ML Maximum Ratings & Electrical Characteristics
| Core Architecture | 16-bit dsPIC33F modified Harvard RISC with DSP engine |
| Performance | 16 MIPS (up to 32 MHz instruction-cycle derived clocking) |
| Program Memory (Flash) | 32 KB (11K x 24) |
| RAM | 2 KB |
| Supply Voltage | 3.0 V to 3.6 V (3.3 V nominal) |
| Package | 28-QFN (6x6 mm) with exposed pad, ML suffix |
| Mounting Type | Surface Mount |
| Operating Temperature | -40C to +85C (I grade) |
| Packaging | Tape & Reel (T suffix) |
| ADC | On-chip 10-bit high-speed ADC |
| Communication Interfaces | UART, SPI, I2C |
| Timers/Capture | Input Capture and Output Compare channels |
| Peripheral Pin Select | Yes (PPS digital peripheral remapping) |
| Programming/Debug | ICSP and in-circuit debug via 2 I/O pins (MPLAB SNAP, PICkit, ICD) |
| Internal Regulator | On-chip 1.8V core regulator; VCAP pin requires 4.7 uF to 10 uF, 16V, low-ESR (<5 Ohm) capacitor |
| Oscillators | Internal FRC and external crystal/PLL options |
| RoHS Status | Compliant |
DSPIC33FJ32GP102T-I/ML Pin Configuration
| Pin 1 | MCLR — Master clear reset (active low) / ICSP programming voltage input |
| Pin 2 | AN0/VREF+/CN2/RB0 — Analog input 0 / ADC positive reference / change notification |
| Pin 3 | AN1/VREF-/CN3/RB1 — Analog input 1 / ADC negative reference / change notification |
| Pin 4 | AN2/SS1/CN4/RB2 — Analog input 2 / SPI1 slave select / change notification |
| Pin 5 | AN3/INDX/CN5/RB3 — Analog input 3 / QEI index input / change notification |
| Pin 6 | AN4/QEA/IC7/CN6/RB4 — Analog input 4 / QEI channel A / input capture 7 |
| Pin 7 | VDD — Positive supply (3.0 V to 3.6 V) |
| Pin 8 | VSS — Ground reference |
| Pin 9 | OSC1/CLKI/CN7/RA2 — Crystal oscillator input / external clock input |
| Pin 10 | OSC2/CLKO/RC15 — Crystal oscillator output / instruction clock output |
| Pin 11 | SDI1/EMUD1/RF2 — SPI1 data in / emulation data pin 1 |
| Pin 12 | SCK1/INT0/EMUC1/RF3 — SPI1 clock / external interrupt 0 / emulation clock pin 1 |
| Pin 13 | U1RX/EMUD2/RF4 — UART1 receive / emulation data pin 2 |
| Pin 14 | U1TX/EMUC2/RF5 — UART1 transmit / emulation clock pin 2 |
| Pin 15 | VCAP — Internal regulator output; requires 4.7-10 uF, 16V, low-ESR (<5 Ohm) capacitor to ground; do not connect to VDD |
| Pin 16 | RF13/EMUD0/RP0 — General purpose I/O / PPS remappable peripheral pin / emulation data pin 0 |
| Pin 17 | RF12/EMUC0/INT1/CVref — General purpose I/O / external interrupt 1 / comparator voltage reference |
| Pin 18 | RF11/AN9/RP5 — Analog input / general purpose I/O / PPS remappable pin |
| Pin 19 | RF8/RP3 — General purpose I/O / PPS remappable peripheral pin |
| Pin 20 | RF7/RP2 — General purpose I/O / PPS remappable peripheral pin |
| Pin 21 | VDD — Positive supply (3.0 V to 3.6 V) |
| Pin 22 | VSS — Ground reference |
| Pin 23 | RB5/AN5/CN11 — Analog input 5 / general purpose I/O / change notification |
| Pin 24 | RF14/RP1 — General purpose I/O / PPS remappable peripheral pin |
| Pin 25 | RA4/SOSCI/CN1/RP4 — Secondary oscillator input / change notification / PPS remappable pin |
| Pin 26 | RA3/SOSCO/T1CK/CN0/RP5B — Secondary oscillator output / Timer1 external clock / PPS remappable pin |
| Pin 27 | RF1/RP6 — General purpose I/O / PPS remappable peripheral pin |
| Pin 28 | RF0/RP7 — General purpose I/O / PPS remappable peripheral pin |
Typical Applications
DSPIC33FJ32GP102T-I/ML is suitable for 6 applications: Brushed and Stepper Motor Control, Digital Power Supplies (PFC, LLC), Sensor Signal Conditioning and Filtering, Lighting Ballasts and LED Drivers, Embedded Industrial Control Nodes, Portable and Battery-Powered Instruments.
Brushed and Stepper Motor Control
The DSPIC33FJ32GP102T-I/ML fits motor control because its 16 MIPS core with single-cycle DSP MAC executes current-loop PID and trajectory math deterministically, while output compare channels generate PWM and input capture channels read quadrature or hall feedback from the same 28-pin QFN. In a brushed-DC servo, the 10-bit ADC samples the shunt-derived current each PWM cycle, the DSP engine computes the duty correction, and loop rates in the tens of kHz are achievable. For sensorless designs, the ADC and comparators support BEMF zero-crossing detection. When complementary PWM with hardware dead time is required, the pin-compatible DSPIC33FJ32MC102-I/ML swaps in without any PCB change.
Recommended
Digital Power Supplies (PFC, LLC)
Digital power conversion benefits directly from this DSC's architecture: the 16 MIPS dsPIC33F core closes voltage and current loops at switching frequency with single-cycle MAC operations for compensator math, while the 10-bit ADC provides feedback sampling triggerable from timer events for deterministic phase alignment with the PWM period. The 32KB Flash holds compensators, soft-start, and protection state machines; the 2KB RAM handles the control state and fault logs. At 3.3V logic with PPS-remappable pins, gate-driver interfaces route cleanly on the 6x6 mm QFN. The on-chip regulator simplifies the power tree - only the VCAP capacitor (4.7-10 uF, 16V, ESR <5 Ohm) is required, per datasheet 70000652f.
Recommended
Sensor Signal Conditioning and Filtering
For sensor nodes that need onboard math, the DSPIC33FJ32GP102T-I/ML replaces a separate MCU-plus-DSP pairing: its hardware DSP engine performs FIR/IIR filtering and fixed-point scaling in real time while the general-purpose core handles protocol and housekeeping. The 10-bit ADC multiplexes several analog inputs (AN0-AN5 class channels with external VREF+ support), and results are processed through the 40-bit accumulator without software overflow handling. UART, SPI, and I2C interfaces - remappable anywhere on available pins via PPS - forward conditioned data to host systems. Operating from -40C to +85C at 3.3V, it suits industrial sensor transmitters where a single 6x6 mm QFN covers acquisition, computation, and communication.
Recommended
Lighting Ballasts and LED Drivers
Electronic ballast and LED driver designs leverage this DSC for closed-loop current regulation, dimming protocols, and PFC stages in one controller. At 16 MIPS, the core runs average-current-mode control at the converter switching frequency, with the DSP MAC handling compensator multiplication each cycle. Output compare channels produce phase-shifted or frequency-modulated PWM for dimming, and the 10-bit ADC samples output current and bus voltage with timer-synchronized conversion. The 32KB Flash stores DALI/0-10V dimming stacks alongside the control loop. Its -40C to +85C rating covers enclosed luminaire temperatures, and the exposed-pad 28-QFN (6x6) sinks heat into the PCB for reliable 3.3V operation.
Recommended
Embedded Industrial Control Nodes
As a general-purpose industrial controller, the part offers an attractive balance: 32KB Flash runs protocol stacks (Modbus RTU over UART, sensor polling over I2C/SPI) plus application logic, while the DSP capability accelerates any onboard math such as scaling, calibration curves, or trending filters. Peripheral Pin Select lets UART, SPI, and I2C land on whichever RP pins the board layout favors, easing routing on dense 28-pin boards. ICSP programming through MPLAB SNAP enables field firmware updates from just the MCLR/PGD/PGC pins. The 3.3V, -40C to +85C industrial rating and RoHS-compliant 28-QFN package make it a drop-in fit for legacy dsPIC33-based control boards in factory equipment.
Recommended
Portable and Battery-Powered Instruments
Handheld instruments benefit from the internal FRC oscillator, which eliminates the crystal and its cost in accuracy-tolerant designs, and from the single-supply 3.0-3.6V operation that matches a single lithium cell with an LDO. The 16 MIPS core delivers responsive UI and measurement math, the 10-bit ADC captures battery voltage and sensor channels, and low-overhead fixed-point DSP filtering cleans noisy transducer signals without external components. The compact 6x6 mm QFN with exposed pad conserves PCB area in pen-style or pocket instruments. In-circuit debug via MPLAB SNAP uses only two spare pins, keeping the enclosure sealed during development, while the 2KB RAM supports averaging buffers and display formatting.
Recommended
Recommended Products Summary
Engineering reference data for DSPIC33FJ32GP102T-I/ML — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | DSPIC33FJ32GP102-I/ML | DSPIC33FJ32GP102T-E/ML | DSPIC33FJ16GP102-I/ML | DSPIC33FJ64GP102-I/ML |
|---|---|---|---|---|---|
| Package | 28-QFN (6x6 mm) ML, exposed pad | 28-QFN (6x6) - same | 28-QFN (6x6) - same | 28-QFN (6x6) - same | 28-QFN (6x6) - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Program Memory (Flash) | 32 KB (11K x 24) | 32 KB | 32 KB | 16 KB | 64 KB |
| Performance | 16 MIPS | 16 MIPS | 16 MIPS | 16 MIPS | 16 MIPS |
| Operating Temperature | -40C to +85C (I grade) | -40C to +85C | -40C to +125C (E grade) | -40C to +85C | -40C to +85C |
| Supply Voltage | 3.0 V to 3.6 V | 3.0 V to 3.6 V | 3.0 V to 3.6 V | 3.0 V to 3.6 V | 3.0 V to 3.6 V |
Key Differentiators
- Extended temperature option in identical footprint (vs DSPIC33FJ32GP102T-E/ML)
- Flash capacity scaling without redesign (vs DSPIC33FJ64GP102-I/ML)
- DSP MAC engine at 16 MIPS in a 28-pin QFN (vs PIC18F2520-I/ML (typical 8-bit alternative))
Design Notes
The on-chip core regulator requires a low-ESR (<5 Ohm) capacitor between 4.7 uF and 10 uF, rated 16V, on the VCAP pin to ground. Per datasheet 70000652f, VCAP must never be connected to VDD - doing so prevents the regulator from starting and is the single most common bring-up failure on new dsPIC33F layouts. Place the VCAP capacitor within 5 mm of the pin with a solid via to ground. Decouple each VDD pin with 0.1 uF ceramic plus one bulk 10 uF per board.
The 28-QFN (6x6) exposed pad should be soldered to a ground pour array of 3x3 or 4x4 vias for thermal dissipation and ground return - do not leave the pad floating even though the part is low power. For ICSP, route MCLR, PGD, and PGC to a 5-pin or 6-pin header (adding VDD and VSS) before the pins are consumed by peripherals; the MPLAB SNAP reference design uses an 8-pin SIL connector. Keep the crystal (if used) within 10 mm of OSC1/OSC2 with guard ground.
Configure Peripheral Pin Select (PPS) early and lock it: un-locked PPS allows runtime remapping that can silently disconnect UART or SPI pins if a software fault writes the PPS registers. Also note that analog-capable pins (AN0-AN5) power up as analog inputs - set the AD1PCFG register to digital before reading digital levels, or inputs will read indeterminate. For oscillator safety, enable the Failsafe Clock Monitor and Clock Switching configuration bits so a crystal failure falls back to FRC instead of hanging the application.
Compliance Information
Distributor listings (DigiKey, Mouser, Hotenda) categorize this part as RoHS compliant. REACH, halogen-free, and conflict-minerals declarations should be confirmed from Microchip's product page or Certificate of Conformance.
