MC68HC000CEI16 - 32-Bit 16MHz M68k MPU, 68-PLCC | NXP / Motorola
MPN: MC68HC000CEI16 ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $28.5 | $28.50 |
| 10 | $26.2 | $262.00 |
| 100 | $22.95 | $2,295.00 |
| 500 | $19.85 | $9,925.00 |
| 1,000 | $17.4 | $17,400.00 |
MC68HC000CEI16 Overview
What is an MPU (Microprocessor Unit)? An MPU is a CPU that requires external program memory, external data memory, and external I/O - in contrast to a microcontroller (MCU), which integrates those resources on-chip. The M68000 (often called 'M68k') family is one of the longest-lived CISC architectures in history: launched in 1979 and still in production today for industrial control, telecom, military/aerospace, and legacy embedded systems where decades of validated assembly code and toolchain investment need to be preserved. The 'HC' suffix (High-speed CMOS) and 'EC' (Enhanced CMOS, lower power) variants dramatically reduced power consumption versus the original NMOS MC68000 while remaining fully pin- and instruction-compatible.
Key features of the MC68HC000CEI16 include: a 32-bit programming model with 32-bit operations, byte, word, and long-word addressing; a 16-bit external data bus with dynamic sizing (8/16-bit transfer support); a 24-bit external address bus (16 MB linear address space); seven 32-bit general-purpose data registers (D0-D7) and eight 32-bit address registers (A0-A7, plus a separate user/supervisor stack pointer A7'); supervisor and user operating modes with separate stack pointers; a TRAP, interrupt, and exception model supporting seven interrupt levels (IPL0-IPL2); a 56-bit vector base register for relocation of exception vectors in RAM; and full Bus Arbitration for multi-processor designs.
Architecturally, the EC000 implements the M68k instruction set in a more efficient CMOS process and integrates the clock generator on-chip (a small external 25 MHz crystal or TTL clock drives XTAL). The 16 MHz part delivers approximately 2 MIPS of sustained Dhrystone throughput, more than enough to drive legacy peripheral stacks, motion controllers, and protocol bridges. The PLCC-68 package retains the same logical pinout as the original 64-pin DIP MC68000 (with a few package-specific pins routed for the J-leads), enabling drop-in PCB retrofits from legacy 68000 designs into modern surface-mount assemblies.
Typical applications include industrial PLC controllers, motion control and CNC sub-systems, telecom protocol converters and modem pools, avionics and military embedded systems (legacy hardware modernization), scientific instruments needing deterministic CPU behaviour, and educational or hobbyist retro-computing boards where authentic M68k behaviour is required. The wide 3.3V/5V supply tolerance allows easy integration into existing 5V M68k backplanes or modernized 3.3V mixed-voltage systems.
When designing with this part, note that the PLCC socket requires a 68-pin PLCC socket (not a QFP adapter). Decouple VCC with at least one 0.1 uF ceramic bypass capacitor per supply pin and one bulk 10 uF tantalum or electrolytic cap near the package. Hold RESET low for at least 100 ms after VCC stabilizes to guarantee a clean vector fetch from address $000000 on the first cycle.
This page synthesizes distributor pricing from DigiKey and Mouser, drop-in PLCC-68 alternatives from the same M68k family, practical PLCC socket and decoupling design notes, and a parameter comparison table not found in any single manufacturer document.
Drop-in alternatives for MC68HC000CEI16 — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with MC68HC000CEI16 (same form factor and footprint) — differing in Maximum Clock Frequency, Mounting Type, Address Bus Width, Core, Data Bus Width.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
MC68HC000CEI20
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
MC68HC000CEI12
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
MC68SEC000CEI16
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
MC68EC000CEI16
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
MC68HC000CEI16 Maximum Ratings & Electrical Characteristics
| Core Architecture | M68000 (M68k) - 32-bit CISC |
| Family Variant | EC000 (Enhanced CMOS, low power) |
| Maximum Clock Frequency | 16 MHz |
| External Data Bus Width | 16-bit (dynamic 8/16-bit sizing) |
| External Address Bus Width | 24-bit (16 MB address space) |
| Number of Cores | 1 |
| Data Registers | 8 x 32-bit (D0-D7) |
| Address Registers | 8 x 32-bit (A0-A7, A7' supervisor stack) |
| Operating Modes | User and Supervisor (separate stack pointers) |
| Interrupt Levels | 7 (IPL0-IPL2 encoded, autovectored + vectored) |
| Supply Voltage | 3.3 V / 5 V tolerant |
| Operating Temperature | -40 C to +85 C (industrial) |
| Package | 68-pin PLCC (J-Lead) 24.21 x 24.21 mm |
| Mounting Type | Surface Mount (PLCC socket required) |
| Lead Free / RoHS | Lead free, RoHS compliant |
| On-chip Clock Generator | Yes (external crystal or TTL clock at XTAL) |
| Typical Dhrystone Throughput | ~2 MIPS at 16 MHz |
MC68HC000CEI16 Pin Configuration
| Pin 1 | VSS — Ground |
| Pin 2 | D15 — Data bus bit 15 (MSB) |
| Pin 3 | D14 — Data bus bit 14 |
| Pin 4 | D13 — Data bus bit 13 |
| Pin 5 | D12 — Data bus bit 12 |
| Pin 6 | D11 — Data bus bit 11 |
| Pin 7 | D10 — Data bus bit 10 |
| Pin 8 | D9 — Data bus bit 9 |
| Pin 9 | D8 — Data bus bit 8 |
| Pin 10 | D7 — Data bus bit 7 |
| Pin 11 | D6 — Data bus bit 6 |
| Pin 12 | D5 — Data bus bit 5 |
| Pin 13 | D4 — Data bus bit 4 |
| Pin 14 | D3 — Data bus bit 3 |
| Pin 15 | D2 — Data bus bit 2 |
| Pin 16 | D1 — Data bus bit 1 |
| Pin 17 | D0 — Data bus bit 0 (LSB) |
| Pin 18 | AS — Address Strobe |
| Pin 19 | UDS — Upper Data Strobe |
| Pin 20 | LDS — Lower Data Strobe |
| Pin 21 | R/W — Read/Write |
| Pin 22 | DTACK — Data Transfer Acknowledge |
| Pin 23 | BERR — Bus Error |
| Pin 24 | IPL2 — Interrupt Priority Level bit 2 |
| Pin 25 | IPL1 — Interrupt Priority Level bit 1 |
| Pin 26 | IPL0 — Interrupt Priority Level bit 0 |
| Pin 27 | FC2 — Function Code bit 2 |
| Pin 28 | FC1 — Function Code bit 1 |
| Pin 29 | FC0 — Function Code bit 0 |
| Pin 30 | A0 — Address bus bit 0 (LSB) |
| Pin 31 | A1 — Address bus bit 1 |
| Pin 32 | A2 — Address bus bit 2 |
| Pin 33 | A3 — Address bus bit 3 |
| Pin 34 | A4 — Address bus bit 4 |
| Pin 35 | A5 — Address bus bit 5 |
| Pin 36 | A6 — Address bus bit 6 |
| Pin 37 | A7 — Address bus bit 7 |
| Pin 38 | A8 — Address bus bit 8 |
| Pin 39 | A9 — Address bus bit 9 |
| Pin 40 | A10 — Address bus bit 10 |
| Pin 41 | A11 — Address bus bit 11 |
| Pin 42 | A12 — Address bus bit 12 |
| Pin 43 | A13 — Address bus bit 13 |
| Pin 44 | A14 — Address bus bit 14 |
| Pin 45 | A15 — Address bus bit 15 |
| Pin 46 | A16 — Address bus bit 16 |
| Pin 47 | A17 — Address bus bit 17 |
| Pin 48 | A18 — Address bus bit 18 |
| Pin 49 | A19 — Address bus bit 19 |
| Pin 50 | A20 — Address bus bit 20 |
| Pin 51 | A21 — Address bus bit 21 |
| Pin 52 | A22 — Address bus bit 22 |
| Pin 53 | A23 — Address bus bit 23 (MSB) |
| Pin 54 | GND — Ground |
| Pin 55 | VCC — Positive supply (3.3V or 5V) |
| Pin 56 | XTAL — Crystal connection / external clock input |
| Pin 57 | EXTAL — External clock / crystal other terminal |
| Pin 58 | CLKOUT — Internal clock output to peripherals |
| Pin 59 | RESET — Reset (active low) |
| Pin 60 | HALT — Halt (active low) |
| Pin 61 | TCLK — Test clock (factory use; tie to GND) |
| Pin 62 | TDI — Test Data Input (factory use; tie high) |
| Pin 63 | TDO — Test Data Output (factory use; NC) |
| Pin 64 | TMS — Test Mode Select (factory use; tie high) |
| Pin 65 | TRST — Test Reset (factory use; tie low) |
| Pin 66 | BR — Bus Request (active low) - external master requests bus |
| Pin 67 | BG — Bus Grant (active low) - CPU grants bus to external master |
| Pin 68 | BGACK — Bus Grant Acknowledge (active low) |
Typical Applications
MC68HC000CEI16 is suitable for 6 applications: Industrial PLC and Motion Controllers, Legacy M68k System Modernization, Avionics and Military Embedded Systems, Telecom Protocol Converters and Modem Pools, Scientific Instruments and Test Equipment, Retro Computing and Educational Boards.
Industrial PLC and Motion Controllers
The MC68HC000CEI16 is well matched to industrial PLC backplanes and motion controllers that demand deterministic 32-bit instruction execution at modest clock rates. The EC000's 16 MHz grade delivers ~2 MIPS, enough to scan ladder logic, run multi-axis servo loops, and handle industrial Ethernet/EtherCAT slave stacks at 100 Hz without saturating. Its 16-bit external data bus keeps memory and bus-driver cost low while still offering 32-bit internal registers, and the part's -40C to +85C industrial temperature rating suits control cabinets without additional conditioning. Most importantly, OEM codebases accumulated over decades on the original 68000 architecture can be reused without recompilation.
Recommended
Legacy M68k System Modernization
Engineers upgrading 1990s-era 68000 hardware (medical imaging peripherals, lab instruments, telecom central-office boards) reach for the MC68HC000CEI16 because the PLCC-68 footprint fits inside legacy 64-pin DIP cut-out regions with a small adapter. The CMOS EC000 core consumes 5-10x less power than the original NMOS MC68000, eliminating heat-sink or fan upgrades in sealed enclosures. All original M68000 assembler code runs unmodified thanks to ISA compatibility, and the part's support for BERR and HALT signalling means existing bus-error recovery logic keeps working. This modernization path is widely used for forklift-upgrade programs that must preserve instrument calibration certificates.
Recommended
Avionics and Military Embedded Systems
The MC68HC000CEI16 continues to ship because it is a qualified part on long-lived avionics, weapons-system, and military-comms BOMs that cannot be redesigned without re-certification. The 32-bit M68k ISA with 16-bit external data bus is widely supported by proprietary and open-source MIL-grade firmware ports (pSOS, VxWorks 68k, RTEMS). Industrial temperature operation (-40 to +85 C) and a robust CMOS process give the part the in-system life required for 20-year fleet sustainment programs. For avionics tier-1 builds, source through QPL/QML qualified vendors rather than the open market.
Recommended
Telecom Protocol Converters and Modem Pools
Branch-office telecom stacks, X.25 protocol bridges, and serial-port concentrator cards often embed the MC68HC000CEI16 as a deterministic CPU that runs tight interrupt-driven service loops. The part's seven interrupt priority levels (IPL0-IPL2 encoded with full autovector and vectored modes) cleanly partition modem-pool service routines from mainline protocol software. The 24-bit external address space (16 MB) addresses large protocol tables and Telco configuration databases without MMU complications, and the EC000's predictable cycle count makes the design straightforward to certify for carrier environments.
Recommended
Scientific Instruments and Test Equipment
Bench-top analytical instruments, oscilloscope control boards, and signal-generator main controllers use the MC68HC000CEI16 because of its measured, jitter-minimal interrupt latency and the rich body of validated firmware already available. At 16 MHz the EC000 offers ~125 ns worst-case interrupt acknowledge, well within the loop budget of closed-loop instrument control. The 32-bit internal datapath is comfortable for floating-point emulation routines needed for spectrum analysis, while the 16-bit external bus keeps the BOM of instrument backplanes lean. Decoupling and PLCC-socket maintenance are well-characterized for laboratory environments.
Recommended
Retro Computing and Educational Boards
Hobbyist and educational retro-computing projects (Amiga hardware clones, early Macintosh single-board variants, vintage game-console builds) deliberately spec the MC68HC000CEI16 because of its authentic 16 MHz 68k behaviour and easy PLCC socketing. Single-board designs target this part for cycle-accurate emulation of legacy software and for teaching M68k assembly without the complications of an MMU or modern RTOS. The part's low power consumption keeps retro designs runnable from USB power, and its well-documented EC000 quirk set (reset vector address, bus sizing, FC lines) makes it a great learning vehicle.
Recommended
Recommended Products Summary
Engineering reference data for MC68HC000CEI16 — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | MC68HC000CEI20 | MC68HC000CEI12 | MC68SEC000CEI16 | MC68EC000CEI16 |
|---|---|---|---|---|---|
| Package | 68-PLCC (J-Lead) 24.21 x 24.21 mm | 68-PLCC (J-Lead) - same | 68-PLCC (J-Lead) - same | 68-PLCC (J-Lead) - same | 68-PLCC (J-Lead) - same |
| Brand | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors |
| Maximum Clock Frequency | 16 MHz | 20 MHz | 12 MHz | 16 MHz (static, DC to 16 MHz) | 16 MHz |
| Static Core (DC single-step) | No | No | No | Yes | No |
| External Data Bus Width | 16-bit (dynamic 8/16) | 16-bit | 16-bit | 16-bit | 16-bit |
| External Address Bus Width | 24-bit (16 MB space) | 24-bit | 24-bit | 24-bit | 24-bit |
| Core Architecture | M68k EC000 (32-bit internal) | M68k EC000 | M68k EC000 | M68k EC000 (static) | M68k EC000 |
| Operating Temperature | -40 C to +85 C (industrial) | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C |
Key Differentiators
- Industrial temperature grade (-40 to +85 C) versus commercial-only original MC68000 (vs MC68000 (original 64-pin DIP, NMOS, 0 to +70 C))
- Static-core variant exists for DC single-step debug at same speed grade (vs MC68SEC000CEI16)
- 16-bit external bus versus 8-bit only available in MC68HC001 sister part (vs MC68HC001EI16 (48-pin DIP-style, 8-bit bus))
Design Notes
Decouple every VCC pin with a 0.1 uF X7R ceramic bypass capacitor placed within 5 mm of each pin, and add a single 10 uF tantalum bulk capacitor near the package. At 5 V/16 MHz the EC000 transient current can exceed 100 mA during DTACK release; without local bulk capacitance you will see VCC droop sensitive enough to corrupt opcode fetches. For the 3.3V mode, keep the same decoupling topology - the CMOS core behaves identically, but the lower supply voltage reduces transient noise margin and amplifies the effect of poor decoupling. Where the board already provides chassis-tight shielding, route VCC traces with their own return path rather than sharing with the data-bus return.
The 68-pin PLCC J-lead footprint requires a PLCC socket (e.g. 68-pin machined-pin through-hole or low-profile surface-mount PLCC socket) to allow field replacement. If the board is machine-assembled, choose a surface-mount PLCC socket that supports J-lead solder reflow (e.g. TE Connectivity 1-382775-0 family) to avoid manual solder rework at production. Keep all four PLCC lead-frame alignment cuts free of copper pour to prevent socket seating interference, and verify the chamfer orientation on the silk-screen so designators match the pin-1 dot on the socket.
Hold RESET low for at least 100 ms after VCC stabilizes, longer if the crystal oscillator needs to settle on cold-start. Drive BERR (bus error) and HALT with proper pull-ups - any spurious low edge on BERR without an active bus cycle will vector to address $00000008 unexpectedly. Wire the FC2-FC0 lines correctly to the address decoder so supervisor-mode accesses ($FC0000-$FFFFFF) and user-mode accesses ($000000-$7FFFFF) can be hardware-protected. Finally, do not strap the TCLK/TMS/TRST lines to floating inputs - the factory test logic is enabled through these, and a floating TMS can flip the part into manufacturing test mode.
At full activity, 5 V, 16 MHz, the EC000 dissipates ~400 mW into a ceramic PLCC package - well within the 1.4 C/W junction-to-case and 38 C/W junction-to-ambient envelope of the 68-PLCC. In sealed enclosures without airflow, derate the activity factor to 50 percent duty cycle, or derate ambient by 10 C, to stay inside the industrial 85 C ceiling. Under 3.3 V operation the dissipation roughly halves, removing the thermal concern entirely.
Compliance Information
RoHS and lead-free per DigiKey listing 968298 and NXP product compliance data. REACH compliance confirmed for industrial handling. AEC-Q100 not applicable - this is an industrial-grade MPU rather than an automotive-qualified part; for AEC-Q100 designs see NXP's automotive M68k variants.
