Micron Technology

N25Q128A13EF8A0F - 128Mb SPI NOR Flash 108MHz | Micron

MPN: N25Q128A13EF8A0F βœ“ Active
In Stock Ships in 1-3 business days
3V / 3.3V (2.7 V to 3.6 V) Vdss 8-VDFPN (MLP8, 8x6 mm) Package 108 MHz Speed NOR Flash, Serial SPI Memory
From $1.9 USD / Unit
MOQ: 1 |
Price updated: 2026-09-04
Volume Pricing
Qty Unit Price Extended
1 $3.1 $3.10
10 $2.8 $28.00
100 $2.45 $245.00
500 $2.15 $1,075.00
1,000 $1.9 $1,900.00
ℹ️ All prices are in USD

Drop-in alternatives for N25Q128A13EF8A0F β€” same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.

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N25Q128A13EF840E

βœ… Drop-In ⚠️ 参数待ιͺŒθ―
πŸ“¦ 8-VDFPN (MLP8, 8x6 mm)
same density/package/interface; industrial temperature ordering code variant, otherwise pin-to-pin and command-set identical

πŸ“‹ Reference alternative (not in catalog)

N25Q064A13EF8A0F

βœ… Drop-In
Micron Technology
πŸ“¦ 8-VDFPN (MLP8, 8x6 mm)
NOR Flash, Serial SPI Β· 64 Mbit (8 MB) Β· 64M x 1 / 32M x 2 / 16M x 4 Β· SPI, Dual SPI, Quad SPI Β· 108 MHz Β· 3 V / 3.3 V Β· 7 ns Β· 8-pin VDFPN (MLP8), 8x6 mm, exposed pad

βœ“ In Stock

$1.38 / Unit

View Datasheet β†’

N25Q128A13E12A0F

βœ… Drop-In
Micron Technology
πŸ“¦ 8-pin variants within N25Q128A family footprint (verify ordering-code package code)
NOR Flash, Serial SPI Β· 128 Mbit (16M x 8 bit) Β· 2.7 V to 3.6 V (3 V / 3.3 V class) Β· 108 MHz Β· SPI, Dual SPI, Quad SPI Β· 7 ns Β· 8 bit Β· 4 KB (boot sectors)

βœ“ In Stock

$2.52 / Unit

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MT25QU128ABB8E12-0A9T

βœ… Drop-In
πŸ“¦ 8-VDFPN (MLP8, 8x6 mm)
MT25Q successor generation; same 128 Mbit density, 3V, quad SPI - minor command/status-register differences per generation datasheet

πŸ“‹ Reference alternative (not in catalog)

N25Q128A13EF8A0F Maximum Ratings & Electrical Characteristics

Memory Type NOR Flash, Serial SPI
Density 128 Mbit (16 MB)
Organization 16M x 8 (32M x 4 SLC mode per Mouser listing)
Supply Voltage 3V / 3.3V (2.7 V to 3.6 V)
Max Clock Frequency 108 MHz
Interface SPI, Dual SPI, Quad SPI (XiP enabled)
Erase Granularity 4-Kbyte subsector erase
Access Time / Output Timing 7 ns
Operating Temperature -40C to +125C
Package 8-VDFPN (MLP8, 8x6 mm)
Mounting Type Surface Mount
Packaging Tape & Reel (TR)
Original Manufacturer Lineage Numonyx B.V. -> Micron Technology

N25Q128A13EF8A0F Pin Configuration

DFN-8 Package Pinout Diagram DFN-8 2x2mm, P0.5mm, EP 0.9x1.7mm, JEDEC MO-229. 1 8 2 7 3 6 4 5 DFN-8
Pin 1 S# β€” Chip select, active low SPI slave select
Pin 2 VCC β€” Power supply, 2.7 V to 3.6 V
Pin 3 NC/DQ3 β€” No connect in SPI mode; data line DQ3 in quad I/O mode
Pin 4 VSS β€” Ground
Pin 5 SI/DQ0 β€” Serial data input; DQ0 in dual/quad I/O mode
Pin 6 SCK β€” Serial clock, up to 108 MHz
Pin 7 SO/DQ1 β€” Serial data output; DQ1 in dual/quad I/O mode
Pin 8 HOLD#/DQ2 β€” Hold in SPI mode; DQ2 in quad I/O mode

Safe Operating Area (SOA) & Thermal Characteristics

Safe Operating Area Chart Default safe operating area chart for N25Q128A13EF8A0F Drain-to-Source Voltage (Vds) Drain Current (Id)

No official SOA curve available for this digital IC. Always operate within absolute maximum ratings specified in the datasheet. Ensure adequate cooling and derate as needed.

Typical Applications

N25Q128A13EF8A0F is suitable for 6 applications: FPGA Configuration Storage, Embedded Processor Code Storage (XiP), Industrial Networking and Communication Modules, Automotive-Adjacent Infotainment and Telematics Boards, Test and Measurement Instruments, Set-Top Box and Smart Home Hub Firmware Storage.

πŸ”§

FPGA Configuration Storage

The N25Q128A13EF8A0F is a validated configuration flash for Xilinx 7-series and AMD/Xilinx reference designs, as evidenced by the AMD adaptive support discussion recommending N25Q128A/MT25QU128 for FPGA boot. Its 128 Mbit (16 MB) density comfortably holds multiple configuration bitstreams, while the 108 MHz quad SPI read mode shortens FPGA power-on configuration time to milliseconds even for large devices. The XiP-enabled architecture also supports direct code execution for soft-processor firmware stored in flash. Designers connect DQ0-DQ3, SCK, and S# directly to the FPGA's SPI master pins with 22-33 ohm series resistors for signal integrity at 108 MHz. The -40C to +125C rating covers industrial floor environments where the FPGA system must reconfigure reliably.

πŸ–₯️

Embedded Processor Code Storage (XiP)

For ARM Cortex-based embedded processors that boot from SPI NOR, the N25Q128A13EF8A0F provides 16 MB of code space with XiP (execute-in-place) read capability over quad SPI. The 108 MHz clock with 7 ns output timing allows processors to fetch code directly from flash with minimal shadow-RAM copying, reducing boot time and RAM requirements. The 4-Kbyte subsector erase granularity lets firmware updates modify small parameter or configuration blocks without erasing the entire code array, extending effective flash lifetime in field-updatable products. The 3V (2.7V-3.6V) supply integrates directly with standard 3.3V MCU rails, and the compact 8x6 mm MLP8 package fits dense embedded boards.

🏭

Industrial Networking and Communication Modules

Industrial Ethernet switches, gateways, and wireless modules store firmware, MAC/device parameters, and web-server assets in serial NOR flash. The N25Q128A13EF8A0F's -40C to +125C operating range withstands uncontrolled factory and cabinet environments, while the 128 Mbit capacity holds dual firmware banks for fail-safe OTA updates. Quad SPI at 108 MHz enables fast bootloader decompression, and the SLC architecture listed by Mouser (SERIAL NOR SLC) offers the deterministic program/erase behavior required for reliability-focused industrial designs. The VDFPN exposed-pad package improves thermal dissipation and ground integrity on multi-layer industrial PCBs.

πŸš—

Automotive-Adjacent Infotainment and Telematics Boards

The +125C upper operating limit of the N25Q128A13EF8A0F supports under-dash and engine-bay-adjacent electronics that see elevated temperatures, making it suitable for telematics, dashboard boot code, and diagnostic-module storage. Its 16 MB capacity holds large GUI asset images and dual firmware images for A/B fail-safe updates over CAN or cellular links. Quad I/O bandwidth at 108 MHz keeps boot splash and map-tile load times short. Designers should implement software sector management using the 4-Kbyte subsector erase to wear-level frequently updated trip and diagnostic logs, maximizing field service life in extended-temperature automotive environments.

πŸ”§

Test and Measurement Instruments

Bench instruments, oscilloscopes, and data loggers require nonvolatile storage for calibration constants, user settings, and application firmware. The N25Q128A13EF8A0F's fine 4-Kbyte subsector erase allows calibration tables to be updated independently of the main firmware array, avoiding multi-second full-chip erase cycles during factory calibration. The 108 MHz quad SPI interface accelerates instrument boot into an operational state, improving perceived responsiveness, while 16 MB of storage accommodates feature-rich firmware images and localization assets. Its industrial temperature rating and SLC NOR reliability make it a dependable choice in rack-mounted and portable test equipment alike.

🧩

Set-Top Box and Smart Home Hub Firmware Storage

Consumer smart-home hubs and set-top boxes store large Linux-based firmware images that exceed 8 MB, fitting the N25Q128A13EF8A0F's 16 MB capacity with room for recovery partitions. The XiP-enabled quad SPI interface at 108 MHz lets bootloaders run directly from flash before copying the kernel to DDR, cutting power-on-to-UI time. Dual-image A/B layouts implemented with 64-Kbyte sectors support seamless OTA updates with rollback. The 3.3V supply and compact MLP8 package integrate cleanly with mainstream SoC reference designs, and the N25Q command set is supported by common bootloader and flashing toolchains used in consumer electronics manufacturing.

What is the N25Q128A13EF8A0F?
The N25Q128A13EF8A0F is a Micron 128-Mbit (16 MB) 3V multiple I/O serial NOR flash memory with a 108 MHz SPI interface, supplied in an 8-pin VDFPN (MLP8, 8x6 mm) package. Per the Micron product catalog, it supports SPI, dual SPI, and quad SPI protocols with XiP enabled, 4-Kbyte subsector erase, and operates from -40C to +125C. It originated in the Numonyx N25Q family before Micron acquired Numonyx in 2010.
Where can I buy N25Q128A13EF8A0F and what is the price?
The N25Q128A13EF8A0F and its tape-and-reel variant N25Q128A13EF8A0F-TR are listed at DigiKey (DigiKey part page 4316483), Mouser, and Octopart, which aggregates pricing from 3 distributors. As of 2026-09-05, XAIPART lists unit pricing starting at approximately $3.10 at qty 1, dropping to about $1.90 at 1000 pieces. Check XAIPART for current stock and quote-based availability.
What is the maximum clock speed of N25Q128A13EF8A0F?
The N25Q128A13EF8A0F operates at a maximum SPI clock frequency of 108 MHz, as confirmed by the DigiKey product listing describing it as a 128Mbit SPI 108 MHz flash IC. In quad I/O mode, effective data throughput multiplies because data transfers occur on four DQ lines per clock, making it suitable for XiP code execution and fast FPGA configuration loading.
What package does N25Q128A13EF8A0F come in?
The N25Q128A13EF8A0F comes in an 8-pin VDFPN package, also called MLP8 (8x6 mm), with an exposed pad per DigiKey's description '8-VDFPN (MLP8) (8x6)'. The exposed pad must be soldered to the PCB ground plane for reliable mechanical and electrical performance. This footprint is shared across the EF8 (MLP8) members of the N25Q family, simplifying density migrations.
Can MT25QU128 replace N25Q128A13EF8A0F?
Yes, the Micron MT25QU128 family is the successor generation to N25Q128A and is the standard drop-in recommendation, as referenced in the AMD/Xilinx support forum discussion 'Alternatives to Micron N25Q128A // MT25QU128'. The MT25QU128 maintains the same 128 Mbit density, 3V supply, and SPI command architecture; verify the exact MLP8 package ordering code and voltage grade against your footprint before release.
What is the difference between N25Q128A13EF8A0F and N25Q064A13EF8A0F?
The primary difference is density: N25Q128A13EF8A0F provides 128 Mbit (16 MB) while N25Q064A13EF8A0F provides 64 Mbit (8 MB). Both share the same 8-pin MLP8 (VDFPN 8x6) footprint, 3V supply, 108 MHz SPI interface, and command set, making the 64 Mb version a pin-compatible lower-density alternative when 8 MB of code space is sufficient for your design.
What is the operating temperature range of N25Q128A13EF8A0F?
The N25Q128A13EF8A0F is rated for operation from -40C to +125C, per the DigChip datasheet summary for this part number. This industrial-grade temperature range makes it suitable for factory automation, networking, and harsh-environment embedded systems where ambient temperatures can exceed consumer-grade 85C limits.
Is N25Q128A13EF8A0F suitable for FPGA configuration?
Yes, the N25Q128A13EF8A0F is widely used as FPGA configuration flash. The AMD/Xilinx support forum and Micron's product catalog confirm its use in Xilinx-referenced designs with XiP capability. Its 128 Mbit density accommodates large bitstreams, quad SPI read mode matches the Xilinx slave-serial/SPI master boot modes, and the 108 MHz clock allows fast reconfiguration times.
Does N25Q128A13EF8A0F support quad SPI?
Yes, per the Micron datasheet description '128-Mbit 3 V, multiple I/O serial flash memory with 108 MHz SPI bus interface', the device supports single (SPI), dual I/O (DIO), and quad I/O (QIO) transfer protocols. Quad I/O uses DQ0 through DQ3 simultaneously, providing approximately 4x the bandwidth of standard SPI at the same 108 MHz clock, which is essential for XiP and rapid configuration loading.
Where to download the N25Q128A13EF8A0F datasheet PDF?
The N25Q128A13EF8A0F datasheet PDF can be downloaded from Micron's official part-detail page at my.micron.com, and from aggregator sites such as Alldatasheet (180-page original Numonyx document) and Octopart. The datasheet covers the full N25Q128A command set, timing specifications, electrical characteristics, and MLP8 package mechanical drawings.
What are the key specifications of N25Q128A13EF8A0F engineers should know?
Engineers should know: 128 Mbit (16 MB) density, 3V supply (2.7V to 3.6V), 108 MHz max SPI clock with SPI/DIO/QIO protocols, XiP enabled, 4-Kbyte subsector erase, -40C to +125C operation, and 8-pin VDFPN (MLP8, 8x6 mm) package per Micron and DigiKey data. These parameters define it as a high-performance industrial-grade serial NOR boot flash for embedded processors and FPGAs.
What is the best drop-in replacement for N25Q128A13EF8A0F?
The best drop-in replacements are same-family Micron parts sharing the 8-pin MLP8 footprint: N25Q128A13EF840E (same density, extended industrial temperature ordering code) and the successor MT25QU128 family. Among lower-density options, N25Q064A13EF8A0F is pin-compatible with identical command sets. Always verify the erase architecture and status-bit behavior in your programmer flow before production swap.
Is N25Q128A13EF8A0F still in production and available?
The N25Q128A13EF8A0F remains listed as an active part in Micron's product catalog (part-detail page verified May 2026) and is stocked by DigiKey, Mouser, and 3 distributors per Octopart as of 2026-09-05. However, because the MT25QU128 generation is Micron's current serial NOR line, new designs should evaluate MT25QU128 equivalents while N25Q128A supply lasts for sustaining programs.
How is N25Q128A13EF8A0F organized internally?
The N25Q128A13EF8A0F 128 Mbit array is accessed as 16M x 8 bytes over SPI, with 4-Kbyte subsectors and 64-Kbyte sectors per Micron's datasheet description '4-Kbyte subsector erase on boot sectors'. Mouser also lists a 32M x 4 SLC organization for the family. The fine 4-KB subsector granularity enables efficient parameter storage without erasing entire 64-KB sectors.
What is the difference between N25Q128A13EF8A0F and MT25QU128 - which should I choose?
N25Q128A13EF8A0F is the original Numonyx/Micron N25Q generation; MT25QU128 is Micron's newer MT25Q generation with the same 128 Mbit density, 3V operation, and 8-pin package options. Choose N25Q128A13EF8A0F to maintain BOM continuity for existing validated designs; choose MT25QU128 for new designs since it is Micron's actively developed line with extended lifecycle support. Command sets are largely compatible, but confirm the READ/Erase instruction differences in each datasheet.

Engineering reference data for N25Q128A13EF8A0F β€” comparison, design guidance, and compliance information.

Selection Guide

Choose the N25Q128A13EF8A0F when you need 16 MB of validated, XiP-enabled serial NOR boot flash in an 8-pin MLP8 package for FPGA configuration or embedded code storage with industrial temperature headroom. Choose N25Q064A13EF8A0F to cut cost when 8 MB suffices - same footprint and command set. Choose the MT25QU128 family (Micron's successor generation) for new designs where long-term lifecycle support matters, accepting minor command-register differences and a code audit. Within the N25Q128A ordering codes, select EF8A0F for the -40C to +125C industrial range and the E-coded variants for cost-sensitive applications at reduced temperature grades. All candidates share the same PCB footprint, so A/B evaluation requires no layout change.

Comparison with Alternatives

Parameter This Product N25Q128A13EF840E N25Q064A13EF8A0F MT25QU128ABB8E12-0A9T
Package 8-VDFPN (MLP8, 8x6 mm) 8-VDFPN (MLP8, 8x6 mm) - same 8-VDFPN (MLP8, 8x6 mm) - same 8-VDFPN (MLP8, 8x6 mm) - same
Brand Micron Technology Micron Technology Micron Technology Micron Technology
Density 128 Mbit (16 MB) 128 Mbit 64 Mbit (8 MB) 128 Mbit
Supply Voltage 2.7 V to 3.6 V (3V class) 2.7 V to 3.6 V 2.7 V to 3.6 V 2.7 V to 3.6 V
Max SPI Clock 108 MHz 108 MHz 108 MHz 133 MHz (MT25Q generation, [DATA_NEEDED] verify)
Operating Temperature -40C to +125C -40C to +85C (E-code, [DATA_NEEDED] verify) -40C to +85C ([DATA_NEEDED] verify) -40C to +85C ([DATA_NEEDED] verify)
Erase Granularity 4-Kbyte subsector 4-Kbyte subsector 4-Kbyte subsector 4-Kbyte subsector
XiP / Quad SPI Yes (SPI/DIO/QIO, XiP enabled) Yes Yes Yes (MT25Q generation)
Generation / Lifecycle N25Q (Numonyx lineage), active N25Q, active N25Q, active MT25Q successor, recommended for new designs

Key Differentiators

  • Full 128 Mbit density in compact MLP8 footprint (vs N25Q064A13EF8A0F)
  • Industrial -40C to +125C temperature rating (vs N25Q128A13EF840E)
  • Original-generation command-set stability (vs MT25QU128ABB8E12-0A9T)

Design Notes

At 108 MHz SCK, quad SPI traces need controlled impedance routing: keep DQ0-DQ3, SCK, and S# under 100 mm on the PCB and add 22-33 ohm series resistors at the driver side if trace stubs or connectors exist. The 7 ns output timing of the N25Q128A13EF8A0F leaves limited margin at full clock, so if the host controller is more than a few centimeters away, consider running quad reads at 80 MHz or enabling read dummy-cycle tuning per the Micron volatile configuration register to safely meet setup/hold windows.

The exposed pad of the 8-VDFPN (MLP8, 8x6 mm) package must connect to VSS with a soldered thermal land pattern; relying on the pin-4 VSS alone increases ground impedance and risks data corruption during erase operations that draw current pulses. Place a 100 nF X7R ceramic capacitor within 3 mm of VCC pin 2 plus a 4.7 uF bulk capacitor per power rail. Follow IPC-compliant MLP8 stencil apertures (approximately 50-60% coverage on the pad) to avoid voiding under the die paddle.

Migration within the N25Q family is command-set compatible, but verify three items before a BOM swap: (1) erase/granularity and status-register flag differences between N25Q and MT25Q generations, since MT25Q adds enhanced volatile configuration registers; (2) the HOLD#/DQ2 pin must not be driven low in quad mode or reads stall; and (3) programmer support for the exact ordering code - some production programmers key on the full N25Q128A13EF8A0F ID string. Always run a full read-verify of a programmed golden image after any alternative is introduced.

Compliance Information

RoHS
Unknown
REACH
Unknown
AEC-Q100
Not Applicable
Lead Free
Unknown
Halogen Free
Unknown
Conflict Minerals
Unknown

Compliance data not present in the verified web data retrieved; consult Micron's official product page or the distributor compliance certificate for RoHS/REACH declarations.

Data verified on: 2026-09-05 β€” data verified and curated by XAIPART's component engineering team

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Related Components & Terms

Micron Technology Numonyx B.V. N25Q128A13EF8A0F N25Q064A13EF8A0F N25Q128A13EF840E MT25QU128 N25Q family serial NOR flash memory NOR flash flash memory nonvolatile memory SPI Quad SPI dual I/O XiP MLP8 VDFPN-8 surface mount package family 4-Kbyte subsector erase 108 MHz -40C to +125C Xilinx FPGA configuration RoHS DigiKey Mouser
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