PCA9509DP,118 - I2C/SMBus Level Translating Repeater | NXP
MPN: PCA9509DP,118 ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $0.64 | $0.64 |
| 10 | $0.58 | $5.80 |
| 100 | $0.52 | $52.00 |
| 500 | $0.47 | $235.00 |
| 1,000 | $0.43 | $430.00 |
PCA9509DP,118 Overview
An I2C repeater (also called a bus buffer or redriver) is an interface IC that regenerates the two-wire serial signals so that capacitive loading and voltage-level differences do not limit bus length or device count. Within the interface-IC hierarchy (repeater -> bus buffer -> I2C/SMBus controller -> communication interface IC), repeaters sit between a low-voltage processor side and a higher-voltage peripheral side, keeping rise times and logic thresholds compliant on both segments.
Key features include dual-supply level translation, supporting a low-voltage side and a standard 3 V to 5.5 V bus side, and bidirectional buffering that extends the I2C-bus by isolating capacitance on each segment. The device retains all operating modes and features of the I2C-bus system during level shifts, including clock stretching and multi-master arbitration behavior. A typical propagation delay of 109 ns and a low 2 pF input capacitance keep timing margin comfortable even at the 400 kHz fast-mode ceiling, while 5 mA supply current suits power-conscious designs.
Technically, the PCA9509 uses open-drain buffer stages with rise-time acceleration so both bus segments retain true open-drain behavior: contention and backplane noise are not passed between segments, and the parts act as fault isolators between a captive processor bus and a larger peripheral bus.
Typical applications include extending I2C from an MCU to backplanes and card cages, level-shifting between 1.x V/1.8 V/2.5 V processors and 3.3 V/5 V SMBus peripherals in servers, telecom line cards, and industrial control panels where bus capacitance would otherwise exceed the 400 pF I2C limit.
Design-wise, plan pull-up resistor values per segment: each buffered side requires its own pull-ups sized for that segment's total capacitance, since the repeater isolates the two sides electrically.
This page synthesizes distributor pricing, availability data, and practical design guidance not found in the manufacturer datasheet, with all parameters traced to NXP and distributor sources as of 2026-10-20.
Drop-in alternatives for PCA9509DP,118 — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
PCA9509PDP,118
✅ Drop-In📋 Reference alternative (not in catalog)
PCA9509DP,112
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
PCA9509DP,118 Specifications
| Function | Level translating I2C-bus/SMBus repeater (buffer, redriver) |
| Number of Channels | 2 (SDA and SCL bidirectional) |
| Input Type | 2-Wire Bus (I2C) |
| Output Type | 2-Wire Bus (I2C/SMBus) |
| Maximum Data Rate | 400 kHz (I2C fast mode) |
| Supply Voltage | 3 V to 5.5 V |
| Supply Current | 5 mA |
| Propagation Delay | 109 ns |
| Input Capacitance | 2 pF |
| Level Translation | Low-voltage processor bus to standard I2C-bus/SMBus |
| Operating Temperature | -40C to +85C |
| Package | 8-TSSOP (SOT505-1) |
| Mounting Type | Surface Mount |
| Packaging | Reel - Tape & Reel (TR) |
| RoHS Status | Compliant (suffix 118 = lead-free/RoHS) |
| Bus Features | Retains all I2C-bus operating modes during level shifts; bidirectional buffering of SDA and SCL |
PCA9509DP,118 8-tssop (sot505-1) Pin Configuration Guide
Pin configuration for PCA9509DP,118 (8-tssop (sot505-1) package). Pin numbering, functions, and connection diagrams are defined in the manufacturer datasheet. Refer to it for the exact footprint and soldering guidelines.
No detailed pinout data available for PCA9509DP,118.
Refer to the datasheet for full pin configuration.
Typical Applications
PCA9509DP,118 is suitable for 6 applications: Server and Telecom Backplane SMBus Extension, Low-Voltage MCU to Standard I2C Peripheral Interfacing, Industrial Control and PLC Racks, Consumer Electronics Display and Sensor Aggregation, LED Lighting and Dimming Control Buses, Test and Measurement Instrument Internal Buses.
Server and Telecom Backplane SMBus Extension
Server management buses and telecom line-card backplanes routinely exceed the unbuffered I2C limit of roughly 400 pF because dozens of FRU EEPROMs, power supplies, and hot-swap controllers share one SMBus segment. The PCA9509DP,118 fits this role because it buffers SDA and SCL bidirectionally, isolating card capacitance from backplane capacitance, while its 3 V to 5.5 V bus-side supply covers standard 3.3 V and 5 V SMBus rails and the -40C to +85C range suits telecom environments. The 109 ns propagation delay and 2 pF input capacitance leave timing margin at the 100 kHz SMBus clock used in Intelligent Platform Management systems. Place one repeater at each card edge connector so a faulty or unpowered card cannot load or clamp the backplane segment; each segment then needs only its own pull-up resistors sized for its local capacitance.
Recommended
Low-Voltage MCU to Standard I2C Peripheral Interfacing
Modern MCUs and SoCs running at 1.8 V or 2.5 V cannot directly drive 3.3 V or 5 V I2C peripherals such as EEPROMs, RTCs, and sensors. The PCA9509DP,118 is purpose-built for this: its level translating repeater lets a processor low-voltage 2-wire serial bus interface with standard I2C-bus or SMBus I/O, retaining all I2C operating modes including clock stretching during the level shift. The processor side references the low-voltage rail while the bus side operates from the 3 V to 5.5 V supply with only 5 mA typical consumption. The 400 kHz fast-mode ceiling matches common MCU I2C peripherals, and the TSSOP-8 footprint occupies under 10 mm2 of board area. Verify the MCU I2C timing budget tolerates the 109 ns repeater delay, and pull up each side to its own rail rather than sharing resistors across the buffer.
Recommended
Industrial Control and PLC Racks
Industrial controllers distribute I2C across racks, operator panels, and remote I/O modules where cable and connector capacitance quickly exceed single-segment limits. The PCA9509DP,118 extends the bus by providing bidirectional buffering for SDA and SCL, and its repeater topology blocks backplane noise and contention from crossing segments, improving noise immunity in electrically harsh factory floors. The -40C to +85C industrial rating and RoHS-compliant TSSOP-8 package support standard industrial assembly. At 100 kHz PLC bus speeds, the 109 ns delay is negligible, and the 5 mA supply current per repeater keeps a multi-segment design's overhead modest. Segment each long cable run with its own repeater and size segment pull-ups for that segment's total capacitance; this topology also localizes faults so one shorted module cannot stall the entire control bus.
Recommended
Consumer Electronics Display and Sensor Aggregation
In TVs, set-top boxes, and smart appliances, an SoC often manages a display panel, tuner, and several sensors over one I2C bus; aggregate capacitance from long flex cables and multiple devices degrades rise times and causes intermittent NACKs. The PCA9509DP,118 solves this by buffering SDA and SCL so panel and sensor segments are electrically isolated, letting each side meet I2C rise-time requirements independently. Its low 2 pF input capacitance barely loads the SoC segment, 400 kHz operation supports fast configuration transactions, and the 3 V to 5.5 V range fits both 3.3 V and 5 V panel rails. In battery-powered consumer products, the 5 mA typical supply current is acceptable for always-on management buses, though designers seeking lower idle current should evaluate dedicated low-power repeater variants for the battery rail.
Recommended
LED Lighting and Dimming Control Buses
Architectural and industrial LED installations daisy-chain driver modules along luminaires, so the I2C control bus spans meters of cable and dozens of driver ICs, far beyond unbuffered limits. The PCA9509DP,118 is appropriate because bidirectional SDA/SCL buffering isolates each luminaire segment's capacitance, and contentio noise from long wiring does not propagate across the repeater, protecting the lighting controller. The 5.5 V maximum bus supply tolerates elevated 5 V rails common in lighting drivers, and the -40C rating covers outdoor luminaire environments. Insert a repeater every few meters or at every branch point, with local pull-ups per segment; the 400 kHz capability permits fast scene-change commands while typical installations run comfortably at 100 kHz where the 109 ns delay is irrelevant.
Recommended
Test and Measurement Instrument Internal Buses
Bench instruments and modular measurement systems use I2C/SMBus to configure attenuators, ADC front-ends, and calibration EEPROMs spread across large PCBs and multiple boards. The PCA9509DP,118 maintains signal integrity on these long internal buses: its repeater action restores open-drain signal levels per segment, the 2 pF input capacitance keeps front-end segments lightly loaded, and 400 kHz supports fast instrument self-test routines. The -40C to +85C range covers unconditioned lab and field environments, and the TSSOP-8 package fits dense mixed-signal boards where footprint area near sensitive analog circuitry is limited. Segment the bus between the digital controller board and each analog board to prevent switching noise coupling; per-segment pull-ups tuned to segment capacitance yield clean edges even at full 400 kHz operation.
Recommended
Recommended Products Summary
Engineering reference data for PCA9509DP,118 — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | PCA9509PDP,118 | PCA9509DP,112 |
|---|---|---|---|
| Package | 8-TSSOP (SOT505-1) | 8-TSSOP (SOT505-1) - same | 8-TSSOP (SOT505-1) - same |
| Brand | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors |
| Function | Level translating I2C/SMBus repeater | Level translating I2C/SMBus repeater (two voltage supplies) | Level translating I2C/SMBus repeater (identical silicon) |
| Max Data Rate | 400 kHz | 400 kHz class | 400 kHz |
| Supply Voltage | 3 V to 5.5 V | 3 V to 5.5 V class | 3 V to 5.5 V |
| Operating Temperature | -40C to +85C | -40C to +85C | -40C to +85C |
Key Differentiators
- Active bidirectional bus buffering, not just level shifting (vs PCA9306DCTR)
- Forward-safe sourcing path within the same footprint (vs PCA9509PDP,118)
- Full I2C operating-mode retention during level shift (vs PCA9509DP,112)
Design Notes
Because the PCA9509DP,118 electrically isolates the two bus segments, each side (processor side and standard bus side) must have its own pull-up resistors to its respective rail. Size the processor-side pull-ups for that segment's small capacitance (the repeater presents only 2 pF), and size the bus-side pull-ups for the full peripheral segment capacitance. Sharing one pull-up pair across the repeater is a common mistake that defeats the buffering and causes marginal rise times. Typical starting values are 4.7 kOhm on short low-voltage segments and 2.2 kOhm to 4.7 kOhm on heavily loaded bus segments at 3.3 V.
Note the packaging-status nuance: NXP's product page marks the PCA9509DP/DG,118 12NC (935293408118) as No Longer Manufactured, while distributor listings for the PCA9509DP,118 remain active at DigiKey, Mouser, and LCSC. Before committing the part to a new production BOM, verify lifecycle status with your distributor and evaluate the PCA9509PDP,118 same-package variant as the forward path. Also budget the 109 ns typical propagation delay into your I2C timing calculations; two repeaters in series at 400 kHz consume roughly 220 ns of the total allowed bus timing.
Keep the TSSOP-8 repeater physically close to the segment boundary it is meant to isolate: at a card-edge connector for backplane applications, or at the cable entry for long panel/cable runs. Route SDA and SCL as a matched pair with a solid ground reference, and decouple VCC with a 100 nF ceramic capacitor placed within 2 mm of the supply pin. Avoid routing I2C traces parallel to switching-node or clock lines; although the repeater blocks contention noise from crossing segments, the open-drain inputs themselves can be disturbed by capacitive coupling on the local segment.
Estimated: with a 5 mA typical supply current at 5 V, each PCA9509DP,118 dissipates roughly 25 mW, so thermal design is trivial in the TSSOP-8 package and no thermal relief is needed even with several repeaters on a board. The dominant power-planning task is instead availability of the correct rail: the standard bus side needs the 3 V to 5.5 V rail present before or simultaneously with bus activity, and the low-voltage processor side must be referenced to a rail that is valid when the processor I2C peripheral is active, or the buffer may hold the processor segment in an undefined state during power sequencing.
Compliance Information
The ',118' NXP ordering suffix denotes RoHS-compliant, lead-free termination. REACH and conflict-minerals declarations should be confirmed via NXP compliance documentation. No AEC-Q100 automotive qualification is indicated in the provided data.
