PIC18LF6585T-I/PT - 8-Bit 40MHz 48KB Flash MCU 64-TQFP | Microchip
MPN: PIC18LF6585T-I/PT ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $9.85 | $9.85 |
| 10 | $8.92 | $89.20 |
| 100 | $7.95 | $795.00 |
| 500 | $6.95 | $3,475.00 |
| 1,000 | $6.1 | $6,100.00 |
PIC18LF6585T-I/PT Overview
A microcontroller (MCU) is a single-chip computer that integrates a CPU core, program memory (Flash/ROM), data memory (RAM), and a configurable set of peripherals (timers, ADC, communication controllers, I/O). The PIC18 family is Microchip's 8-bit high-performance architecture, sitting between the baseline PIC10/12/16 families and the 16-bit dsPIC/PIC24 families in the company's embedded-control hierarchy. LF variants run at lower core voltages (typically 2.0-3.6 V) and target low-power and battery-backed designs.
Key features include 40 MHz maximum clock, 16-bit wide instruction word, 1024 bytes of EEPROM, ECAN 2.0B controller, up to 12-channel 10-bit ADC, two USART modules, MSSP (SPI/I2C), two CCP and one ECCP modules, four timers, and an industrial-grade operating temperature of -40C to +85C. The wide memory map (24K x 16 Flash) supports moderately complex state machines and CAN-based protocol stacks.
The PIC18LF6585T-I/PT's nanoWatt Technology, idle/sleep modes with multiple wake-up sources, and on-board ECAN controller make it well-suited for power-conscious, networked embedded nodes. The architecture is a Harvard-design modified RISC core with 16-bit instructions and 8-bit data path, providing deterministic interrupt latency for real-time control loops.
Typical applications include industrial automation and CAN-bus nodes, automotive body-electronics ECUs, HVAC and building-control controllers, motor control front-ends, and sensor/data-acquisition subsystems. The combination of 48 KB Flash and 3.25 KB RAM is sufficient for CANopen, DeviceNet, and J1939 protocol stacks.
When designing with this device, budget oscillator start-up time (typically 1024 Tosc) before relying on timing-critical peripherals, and use Microchip's MPLAB X IDE with the free XC8 compiler for code generation. Decoupling: place a 100 nF capacitor on each VDD pin and a bulk 10 uF on the analog AVDD rail.
This page synthesizes XAIPART distributor pricing, same-family drop-in alternatives, and practical design notes drawn from Microchip's PIC18F6680/8585/6685 family datasheet, going beyond raw repackaging of the datasheet.
Drop-in alternatives for PIC18LF6585T-I/PT — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with PIC18LF6585T-I/PT (same form factor and footprint) — differing in Core Architecture, Package, Program Memory (Flash), Operating Temperature, Timers.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
PIC18LF6585-I/PT
✅ Drop-In📋 Reference alternative (not in catalog)
PIC18LF6685-I/PT
✅ Drop-In📋 Reference alternative (not in catalog)
PIC18LF6680-I/PT
✅ Drop-In✓ In Stock
$7.21 / Unit
View Datasheet →PIC18F6585-I/PT
✅ Drop-In📋 Reference alternative (not in catalog)
PIC18LF6525T-I/PT
✅ Drop-In✓ In Stock
$5.95 / Unit
View Datasheet →PIC18LF6520T-I/PT
✅ Drop-In✓ In Stock
$5.25 / Unit
View Datasheet →PIC18F8680-I/PT
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
PIC18LF6585T-I/PT Maximum Ratings & Electrical Characteristics
| Core Architecture | PIC18F 8-bit RISC |
| Maximum CPU Clock | 40 MHz |
| Program Memory (Flash) | 48 KB (24K x 16) |
| Data SRAM | 3.25 KB (3328 bytes) |
| Data EEPROM | 1 KB (1024 bytes) |
| Package | 64-TQFP (10x10 mm), PT suffix, tape-and-reel |
| I/O Pins | 52 |
| ADC | 10-bit, up to 12 channels |
| CAN Module | ECAN 2.0B |
| UART/USART | 2 |
| MSSP (SPI/I2C) | 1 |
| CCP / ECCP | 2 CCP + 1 ECCP |
| Timers | 4 (Timer0/1/2/3) |
| Operating Voltage (LF) | 2.0 V to 3.6 V (LF variants) |
| Operating Temperature | -40C to +85C (industrial, I grade) |
| Mounting Type | Surface Mount (TQFP) |
| MSL Level | 3 (per JEDEC J-STD-020) |
| RoHS Status | Compliant |
PIC18LF6585T-I/PT Pin Configuration
| Pin 1 | RG0 — PORTG bit 0 / digital I/O |
| Pin 2 | RG1 — PORTG bit 1 / digital I/O |
| Pin 3 | RG2 — PORTG bit 2 / digital I/O |
| Pin 4 | RG3 — PORTG bit 3 / digital I/O |
| Pin 5 | RG4 — PORTG bit 4 / digital I/O |
| Pin 6 | MCLR — Master Clear (reset, active low) |
| Pin 7 | OSC1 — Crystal/oscillator input |
| Pin 8 | OSC2 — Crystal/oscillator output |
| Pin 9 | RA0/AN0 — PORTA bit 0 / analog input 0 |
| Pin 10 | RA1/AN1 — PORTA bit 1 / analog input 1 |
| Pin 11 | RA2/AN2 — PORTA bit 2 / analog input 2 |
| Pin 12 | RA3/AN3 — PORTA bit 3 / analog input 3 |
| Pin 13 | RA4/T0CKI — PORTA bit 4 / Timer0 clock |
| Pin 14 | RA5/AN4 — PORTA bit 5 / analog input 4 |
| Pin 15 | RE0/RD — PORTE bit 0 / CAN RD |
| Pin 16 | RE1/WR — PORTE bit 1 / CAN WR |
| Pin 17 | RE2/CS — PORTE bit 2 / CAN CS |
| Pin 18 | VDD — Logic supply (2.0-3.6 V LF) |
| Pin 19 | VSS — Logic ground |
| Pin 20 | AVDD — Analog supply |
| Pin 21 | AVSS — Analog ground |
| Pin 22 | RA6/OSC2 — PORTA bit 6 / alt oscillator |
| Pin 23 | RA7/OSC1 — PORTA bit 7 / alt oscillator |
| Pin 24 | RC0/T1OSO — PORTC bit 0 / Timer1 oscillator out |
| Pin 25 | RC1/T1OSI/CCP2 — PORTC bit 1 / Timer1 osc in / CCP2 |
| Pin 26 | RC2/CCP1 — PORTC bit 2 / CCP1 |
| Pin 27 | RC3/SCK/SCL — PORTC bit 3 / SPI SCK / I2C SCL |
| Pin 28 | RC4/SDI/SDA — PORTC bit 4 / SPI SDI / I2C SDA |
| Pin 29 | RC5/SDO — PORTC bit 5 / SPI SDO |
| Pin 30 | RC6/TX1/CK1 — PORTC bit 6 / USART1 TX |
| Pin 31 | RC7/RX1/DT1 — PORTC bit 7 / USART1 RX |
| Pin 32 | RB0/INT0 — PORTB bit 0 / external interrupt 0 |
| Pin 33 | RB1/INT1 — PORTB bit 1 / external interrupt 1 |
| Pin 34 | RB2/INT2 — PORTB bit 2 / external interrupt 2 |
| Pin 35 | RB3/INT3/ECCP2 — PORTB bit 3 / INT3 / ECCP2 |
| Pin 36 | RB4/INT4 — PORTB bit 4 / external interrupt 4 |
| Pin 37 | RB5/INT5 — PORTB bit 5 / external interrupt 5 |
| Pin 38 | RB6/PGC — PORTB bit 6 / ICSP clock |
| Pin 39 | RB7/PGD — PORTB bit 7 / ICSP data |
| Pin 40 | VDD — Logic supply (2.0-3.6 V LF) |
| Pin 41 | VSS — Logic ground |
| Pin 42 | RD0/ECCP1 — PORTD bit 0 / ECCP1 |
| Pin 43 | RD1 — PORTD bit 1 |
| Pin 44 | RD2 — PORTD bit 2 |
| Pin 45 | RD3 — PORTD bit 3 |
| Pin 46 | RD4/ECANRX — PORTD bit 4 / ECAN receive |
| Pin 47 | RD5/ECANTX — PORTD bit 5 / ECAN transmit |
| Pin 48 | RD6 — PORTD bit 6 |
| Pin 49 | RD7 — PORTD bit 7 |
| Pin 50 | RE3 — PORTE bit 3 |
| Pin 51 | RE4 — PORTE bit 4 |
| Pin 52 | RE5 — PORTE bit 5 |
| Pin 53 | RE6 — PORTE bit 6 |
| Pin 54 | RE7 — PORTE bit 7 |
| Pin 55 | RF0 — PORTF bit 0 |
| Pin 56 | RF1 — PORTF bit 1 |
| Pin 57 | RF2 — PORTF bit 2 |
| Pin 58 | RF3 — PORTF bit 3 |
| Pin 59 | RF4 — PORTF bit 4 |
| Pin 60 | RF5 — PORTF bit 5 |
| Pin 61 | RF6 — PORTF bit 6 |
| Pin 62 | RF7 — PORTF bit 7 |
| Pin 63 | VDD — Logic supply (2.0-3.6 V LF) |
| Pin 64 | VSS — Logic ground |
Typical Applications
PIC18LF6585T-I/PT is suitable for 6 applications: Industrial CAN-Bus Nodes, Automotive Body Electronics ECUs, HVAC and Building Control, Motor Control Front-End (Sensorless BLDC / PFC), Sensor Data-Acquisition and DAQ Modules, Smart Energy / Sub-Metering.
Industrial CAN-Bus Nodes
The PIC18LF6585T-I/PT's integrated ECAN 2.0B controller and 48 KB Flash make it a strong fit for industrial CAN-bus nodes running CANopen or DeviceNet stacks. With 52 I/O pins it directly interfaces to digital sensors, contactors, and 24 V industrial field wiring via optocouplers. The 40 MHz core handles a full CANopen CiA 401/402/404 stack with sub-millisecond cycle times, while the LF 2.0-3.6 V core permits battery-backed operation during brown-outs. Its -40C to +85C industrial temperature range covers factory-floor deployment.
Recommended
Automotive Body Electronics ECUs
The PIC18LF6585T-I/PT is well-suited to automotive body-electronics modules (door, seat, mirror controllers) that require CAN connectivity, multiple PWM outputs for motor drive, and ADC channels for current sensing. Its 2 CCP + 1 ECCP modules deliver the three complementary PWM channels needed for half-bridge driver control. The 12-channel 10-bit ADC samples thermistor and potentiometer inputs simultaneously, and 3.25 KB SRAM buffers CAN frames during gateway forwarding. Note: for under-hood environments choose an AEC-Q100 qualified variant rather than the industrial-grade LF6585T.
Recommended
HVAC and Building Control
Building-automation controllers benefit from the PIC18LF6585T-I/PT's CAN connectivity for BACnet/Modbus gateways, plus 52 I/O to drive relays, triacs, and 0-10 V analog outputs for damper and valve actuators. The 48 KB Flash accommodates the full BACnet MS/TP or LonWorks application profile with room for custom scheduling logic. The LF 2.0-3.6 V core supports 24 VAC transformer-rectified supply rails without a step-down regulator, lowering BOM cost. Industrial-grade -40C to +85C operation tolerates rooftop and plant-room mounting.
Recommended
Motor Control Front-End (Sensorless BLDC / PFC)
The PIC18LF6585T-I/PT's ECCP module with auto-shutdown and 40 ns PWM resolution is sufficient to drive sensorless BLDC or PFC front-end stages using the PIC18 reference design family. 12 ADC channels sample back-EMF, current, and bus voltage simultaneously with the 10-bit result. The 48 KB Flash holds Microchip's AN1078 sensorless BLDC or AN1114 digital PFC firmware library. Pair with a TC4427 gate driver and an IRFR3711 MOSFET stage for a 24 V / 5 A complete fan or pump drive.
Recommended
Sensor Data-Acquisition and DAQ Modules
The PIC18LF6585T-I/PT's 12-channel 10-bit ADC and 52 I/O suit compact multi-channel data-acquisition modules that report over CAN or RS-485. The 1 KB EEPROM provides non-volatile calibration storage, while 3.25 KB SRAM buffers up to 200 samples at 10-bit resolution before CAN transmission. The 40 MHz core completes FFT averaging of 256-point blocks in real time, enabling vibration / acoustic-emission monitoring. The LF core voltage allows direct Li-ion battery operation for portable DAQ carts.
Recommended
Smart Energy / Sub-Metering
Single-phase electricity sub-meters and energy-monitoring IoT nodes use the PIC18LF6585T-I/PT's ECAN to publish consumption data on building CAN backbones. 12 ADC channels sample line voltage and current via CTs and resistor dividers at 4 kHz, with the 40 MHz core computing true-RMS and fundamental-reactive power in real time. The 48 KB Flash accommodates a complete IEC 62053-21 class-1 meter algorithm. The LF core draws less than 1 mA active, ideal for line-powered meters with sleep-mode outage reporting.
Recommended
Recommended Products Summary
Engineering reference data for PIC18LF6585T-I/PT — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | PIC18LF6585-I/PT | PIC18LF6685-I/PT | PIC18LF6680-I/PT | PIC18F6585-I/PT | PIC18LF6525T-I/PT | PIC18LF6520T-I/PT |
|---|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 64-TQFP (10x10) | 64-TQFP (10x10) - same | 64-TQFP (10x10) - same | 64-TQFP (10x10) - same | 64-TQFP (10x10) - same | 64-TQFP (10x10) - same | 64-TQFP (10x10) - same |
| Flash Memory | 48 KB | 48 KB | 64 KB | 64 KB | 48 KB | 48 KB | 32 KB |
| SRAM | 3.25 KB | 3.25 KB | 3.8 KB | 3.8 KB | 3.25 KB | 3.8 KB | 2 KB |
| EEPROM | 1 KB | 1 KB | 1 KB | 1 KB | 1 KB | 1 KB | 1 KB |
| Core Voltage | 2.0-3.6 V (LF) | 2.0-3.6 V (LF) | 2.0-3.6 V (LF) | 2.0-3.6 V (LF) | 4.2-5.5 V (F) | 2.0-3.6 V (LF) | 2.0-3.6 V (LF) |
| ECAN Module | Yes | Yes | Yes | Yes | Yes | Yes | No |
| USB | No | No | Yes (USB 2.0 OTG) | No | No | No | No |
| I/O Pins | 52 | 52 | 52 | 52 | 52 | 52 | 52 |
| Maximum Clock | 40 MHz | 40 MHz | 40 MHz | 40 MHz | 40 MHz | 40 MHz | 40 MHz |
Key Differentiators
- Tape-and-reel carrier for high-volume SMT assembly (vs PIC18LF6585-I/PT)
- LF core enables 3.3 V-only battery-backed designs (vs PIC18F6585-I/PT)
- Integrated ECAN 2.0B eliminates external CAN controller (vs PIC18LF6520T-I/PT)
Design Notes
The PIC18LF6585T-I/PT has multiple VDD/VSS pins (18, 19, 40, 41, 63, 64) plus separate AVDD/AVSS (20, 21). Place a 100 nF ceramic decoupling capacitor on every VDD pin and a single 10 uF bulk capacitor near the AVDD pin. Star-ground the analog and digital returns at the IC. The LF core is sensitive to VDD ripple - use a ferrite bead between digital and analog rails if ADC performance is critical.
For ECAN signaling integrity, route CANH/CANL as a differential pair with 120 ohm characteristic impedance, equal length, and ground reference. Place the MCP2551 transceiver within 25 mm of the ECANTX/ECANRX pins to minimize stub length and ringing. Use Microchip's AN228 / PIC18F ECAN layout guidelines (4-layer PCB preferred). Keep oscillator traces short and surround with a ground ring.
Do not forget the 1024 Tosc oscillator start-up timer (OST) delay after POR before executing timing-critical code. The MCLR pin requires a 10 kohm pull-up to VDD - leaving it floating prevents startup. Configure unused I/O pins as outputs (not inputs) to reduce supply current by ~1 mA total in sleep mode. Finally, the LF6585 must NOT be powered above 3.6 V (the non-LF PIC18F6585 supports 5 V); exceeding this damages the device.
Compliance Information
RoHS and REACH compliant per Microchip product page; the PT suffix denotes Pb-free matte-tin plating. AEC-Q100 not qualified - for under-hood automotive choose PIC18F25K80 / PIC18F46K80 AEC-Q100 family. Halogen-free status available on request from Microchip environmental compliance.
