ADS6145IRHB25 - 14-bit 125MSPS Low-Power ADC | Texas Instruments
N.º da peça: ADS6145IRHB25 ✓ Ativo| Qtd. | Preço unitário | Total |
|---|---|---|
| 1 | $28.5 | $28,50 |
| 10 | $25.62 | $256,20 |
| 100 | $22.85 | $2.285,00 |
| 500 | $20.1 | $10.050,00 |
| 1.000 | $18.2 | $18.200,00 |
ADS6145IRHB25 Visão geral
An ADC (Analog-to-Digital Converter) is a data-acquisition integrated circuit that samples continuous analog signals and converts them into discrete digital codes for processing by FPGAs, DSPs, or microcontrollers. Within the broader semiconductor hierarchy, the ADS6145 belongs to the data-converter IC family, sits inside the signal-chain sub-system, and is classified as a pipelined ADC because it uses a multi-stage switched-capacitor architecture to achieve high sample rates at moderate power. Pipelined ADCs are favored over SAR or delta-sigma types when sampling speed exceeds ~10 MSPS while still preserving 10-14 bit resolution.
Key specifications include 125 MSPS maximum sample frequency, 14-bit resolution, selectable CMOS or LVDS digital outputs, internal sample-and-hold, and a low-jitter clock buffer. The 32-VQFN package with exposed thermal pad provides ~32 C/W junction-to-ambient thermal resistance, suitable for reflow soldering on standard FR-4 boards with moderate copper-area thermal relief.
The ADS6145 architecture uses a multi-stage pipelined core with digital error correction. Its high input bandwidth allows IF sampling in software-defined radio, while the low-jitter clock path minimizes aperture-time-induced SNR degradation. Programmable gain and offset correction are performed digitally, simplifying analog front-end calibration.
Typical applications include wireless base-station receivers, software-defined radio, portable test and measurement instrumentation, medical imaging front ends, and high-speed data acquisition cards. The wide analog input bandwidth also makes it suitable for digitizing IF signals in communication receivers.
When designing with this device, ensure the analog input network is bandwidth-limited to the target Nyquist zone and that the LVDS/CMOS mode select pin is correctly biased before power-up. Decouple AVDD and DVDD with separate 0.1 uF and 10 uF ceramic capacitors placed as close to the IC as possible to maintain SNR.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found on the manufacturer product page, giving engineers a single-source reference for part selection and PCB bring-up.
Alternativas drop-in para ADS6145IRHB25 — mesmo encapsulamento, compatível pino a pino. Peças de encapsulamento diferente que exigem retrabalho na PCB são excluídas.
Variantes desta série
Modelos da mesma série compatíveis como drop-in com ADS6145IRHB25 (mesmo formato e footprint) — diferindo em Input Type, Package, Digital Supply Voltage, Resolution, Analog Supply Voltage.
Ferramenta de comparação rápida — selecione peças alternativas para comparação lado a lado:
ADS6145IRHBT
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
ADS6144IRHBR
✅ Drop-In✓ Em estoque
$18.2 / unidade
Ver ficha técnica →ADS6143IRHBR
✅ Drop-In✓ Em estoque
$20.9 / unidade
Ver ficha técnica →ADS6142IRHBR
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
ADS6145IRHB25 Classificações máximas e características elétricas
| Resolução | 14 bit |
| Sample Rate | 125 MSPS (max) |
| Architecture | Pipelined |
| Number of Input Channels | 1 |
| Input Type | Single-ended |
| Output Interface | Selectable parallel CMOS or LVDS |
| Analog Supply Voltage | 3.3 V |
| Digital Supply Voltage | 3.3 V |
| Output Code Format | Binary (offset binary) |
| Temperatura de operação | -40C to +85C (industrial) |
| Encapsulamento | 32-VQFN (5x5 mm, RHB) with exposed pad |
| Contagem de pinos | 32 |
| Tipo de montagem | Surface Mount |
| Status RoHS | Compliant |
Configuração de pinos do ADS6145IRHB25
| Pino 1 | AVDD — Analog 3.3V supply |
| Pino 2 | GND — Ground |
| Pino 3 | INP — Analog input (single-ended, positive) |
| Pino 4 | VCM — Common-mode voltage output |
| Pino 5 | DRVDD — Digital output driver supply |
| Pino 6 | OUTMODE — Output mode select (CMOS / LVDS) |
| Pino 7 | D0 — Data output bit 0 (LSB) |
| Pino 8 | D1 — Data output bit 1 |
| Pino 9 | D2 — Data output bit 2 |
| Pino 10 | D3 — Data output bit 3 |
| Pino 11 | D4 — Data output bit 4 |
| Pino 12 | D5 — Data output bit 5 |
| Pino 13 | D6 — Data output bit 6 |
| Pino 14 | D7 — Data output bit 7 |
| Pino 15 | D8 — Data output bit 8 |
| Pino 16 | D9 — Data output bit 9 |
| Pino 17 | D10 — Data output bit 10 |
| Pino 18 | D11 — Data output bit 11 |
| Pino 19 | D12 — Data output bit 12 |
| Pino 20 | D13 — Data output bit 13 (MSB) |
| Pino 21 | CLK — Clock input |
| Pino 22 | CLKB — Complementary clock input |
| Pino 23 | OE — Output enable |
| Pino 24 | PD — Power-down |
| Pino 25 | RESET — Digital reset |
| Pino 26 | SDOUT — Serial data output (for register access) |
| Pino 27 | SEN — Serial enable |
| Pino 28 | SCLK — Serial clock |
| Pino 29 | SDIO — Serial data input/output |
| Pino 30 | DRGND — Digital ground |
| Pino 31 | AVDD — Analog 3.3V supply (secondary) |
| Pino 32 | AVDD — Analog 3.3V supply (secondary) |
Aplicações típicas
ADS6145IRHB25 é adequado para 6 aplicaçãos: Wireless Base-Station Receiver, Software-Defined Radio (SDR), Portable Test & Measurement Instrumentation, Medical Imaging Front End, High-Speed Data Acquisition Card, Industrial Process Control Digitizer.
Wireless Base-Station Receiver
The ADS6145IRHB25's 125 MSPS sample rate and high analog input bandwidth enable direct IF sampling in wireless base-station receiver chains, eliminating a down-conversion stage. Its 14-bit resolution provides >75 dB SNR suitable for UMTS, LTE, and similar modulation schemes requiring high dynamic range. The pipelined architecture with low-jitter clock buffer preserves aperture timing accuracy, critical for EVM compliance in 3G/4G base stations. Placed between the analog front-end mixer output and the FPGA digital down-converter, it accepts single-ended inputs and outputs either CMOS or LVDS data, simplifying board routing to the FPGA. Its 3.3V supply aligns with standard base-station power rails.
Recomendado
Software-Defined Radio (SDR)
Software-defined radio platforms benefit from the ADS6145IRHB25's combination of 125 MSPS sampling and 14-bit resolution, allowing wide-bandwidth IF or RF digitization followed by DSP-based demodulation. The high input bandwidth supports Nyquist-zone-2 sampling, simplifying analog front-end filtering. The selectable CMOS/LVDS output interface gives the designer flexibility to route directly to either a parallel FPGA bus or a low-voltage differential signal chain. With an exposed-pad 32-VQFN package, the part can be placed close to the antenna signal chain while dissipating ~250 mW typical, well within SDR thermal envelopes for portable or handheld units.
Recomendado
Portable Test & Measurement Instrumentation
The ADS6145IRHB25's low-power pipelined architecture (typical 250 mW at 125 MSPS) is well-matched to portable oscilloscopes, spectrum analyzers, and arbitrary waveform digitizers where power budget is critical. The 14-bit resolution captures dynamic range adequate for general-purpose lab instruments, while the 125 MSPS sample rate supports real-time bandwidths above 50 MHz. Industrial temperature range (-40C to +85C) ensures operation in field-deployed or vehicle-mounted test gear. The 32-VQFN 5x5 mm footprint integrates cleanly into compact handheld form factors, and CMOS/LVDS output selection enables direct connection to FPGA DSP back-ends.
Recomendado
Medical Imaging Front End
In ultrasound and other medical imaging front ends, the ADS6145IRHB25's 125 MSPS sample rate enables direct digitization of multi-MHz analog echo signals with 14-bit dynamic range, sufficient for tissue harmonic imaging modes. The pipelined architecture's high SFDR helps suppress spurious signals that could otherwise create image artifacts. Single-channel operation aligns with single-element transducer inputs and reduces front-end complexity. The exposed-pad 32-VQFN package manages heat dissipation at sustained sampling rates, while the 3.3V analog/digital supply rails integrate easily with medical-instrument power trees. Industrial temperature rating supports diagnostic equipment operating in controlled clinical environments.
Recomendado
High-Speed Data Acquisition Card
PCIe and PXI data acquisition cards benefit from the ADS6145IRHB25's 125 MSPS sample rate and 14-bit resolution, providing real-time digitization of multiple analog channels (one ADC per channel) with sub-microsecond latency. The pipelined architecture supports sustained throughput without processor-memory loss. The CMOS/LVDS selectable output interfaces the part directly to FPGAs that perform on-card DSP before forwarding to the system bus. The 32-VQFN package's small footprint (25 mm^2) allows dense multi-channel PCB layouts typical of 4/8/16-channel DAQ boards. Industrial operating temperature and RoHS compliance meet typical commercial DAQ card requirements.
Recomendado
Industrial Process Control Digitizer
Process-control analog front-ends for vibration, acoustic, and high-speed sensor monitoring benefit from the ADS6145IRHB25's combination of 125 MSPS sampling, 14-bit resolution, and -40C to +85C industrial temperature range. The pipelined ADC's high SFDR rejects spurious tones that could cause false event triggers in vibration monitoring. Single-ended input and 3.3V supply align with industrial sensor-conditioning circuits. The CMOS/LVDS output flexibility allows the digitizer to interface with low-cost microcontrollers or industrial FPGAs. The exposed-pad 32-VQFN package provides adequate thermal performance for continuous 24/7 factory-floor operation. RoHS and lead-free compliance support industrial regulatory environment.
Recomendado
Resumo dos produtos recomendados
Dados de referência de engenharia para ADS6145IRHB25 — comparação, orientação de projeto e informações de conformidade.
Guia de seleção
Comparação com alternativas
| Parâmetro | Este produto | ADS6145IRHBT | ADS6144IRHBR | ADS6143IRHBR | ADS6142IRHBR |
|---|---|---|---|---|---|
| Package | 32-VQFN (5x5 mm, RHB) | 32-VQFN (5x5 mm, RHB) | 32-VQFN (5x5 mm, RHB) | 32-VQFN (5x5 mm, RHB) | 32-VQFN (5x5 mm, RHB) |
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| Sample Rate (MSPS) | 125 | 125 | 105 | 80 | 65 |
| Resolution (bits) | 14 | 14 | 14 | 14 | 14 |
| Input Channels | 1 | 1 | 1 | 1 | 1 |
| Output Interface | CMOS or LVDS | CMOS or LVDS | CMOS or LVDS | CMOS or LVDS | CMOS or LVDS |
| Supply Voltage | 3.3 V | 3.3 V | 3.3 V | 3.3 V | 3.3 V |
| Operating Temperature | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C |
| Lifecycle Status | Active | Active | Active | Active | Active |
Principais diferenciais
- Highest sample rate in the ADS614X family (vs ADS6143IRHBR)
- Single-channel low-power pipelined ADC at 125 MSPS (vs ADS6144IRHBR)
- Selectable CMOS/LVDS output interface (vs ADS6142IRHBR)
Notas de projeto
Place separate 0.1 uF and 10 uF ceramic decoupling capacitors on each AVDD pin and DRVDD pin, located within 2 mm of the IC pad. Use a continuous ground plane on the layer immediately below the ADC and stitch the exposed thermal pad to ground with at least 9 thermal vias in a 3x3 array. Keep the analog input trace short and guarded by ground to minimize coupling of digital switching noise into the analog front-end. This layout minimizes SNR degradation that is otherwise common in mixed-signal ADC PCB designs.
The clock input (CLK/CLKB) requires a low-jitter, differential source with < 1 ps RMS jitter to preserve aperture-time-limited SNR. Route CLK/CLKB as a 100-ohm differential pair with length-matched traces. If using CMOS single-ended clock, drive CLK and AC-couple CLKB to ground with a 0.1 uF cap. Poor clock quality is the single largest cause of measured SNR being below datasheet figures at high input frequencies.
Do not apply analog input signals before AVDD and DRVDD are stable. Tie the OUTMODE pin correctly (logic low for CMOS, logic high for LVDS) before power-up; changing modes mid-operation may corrupt digital outputs. Always issue a RESET pulse after power-up to clear internal registers. Leave unused digital outputs (D0-D13) floating or terminated per the output-mode datasheet guidance; do not tie them to ground.
At 125 MSPS full-rate sampling, the ADS6145IRHB25 dissipates approximately 250 mW. The 32-pin 5x5 mm VQFN with exposed pad provides ~32 C/W junction-to-ambient thermal resistance with a standard 4-layer FR-4 PCB. Ensure the thermal pad is soldered to a copper pour of at least 25 mm^2 with 9 thermal vias to the internal ground plane. Industrial temperature operation up to +85C ambient is achievable without external heatsinking under typical lab conditions.
Informações de conformidade
RoHS and lead-free per TI product page. Industrial temperature grade; not AEC-Q100 qualified for automotive. For automotive applications, consider AEC-Q100 qualified ADS624X family instead.
