PIC32MZ2064DAK169T-I/HF - 200MHz 32-bit MCU w/ 2MB Flash & Graphics | Microchip
N.º da peça: PIC32MZ2064DAK169T-I/HF ✓ Ativo| Qtd. | Preço unitário | Total |
|---|---|---|
| 1 | $22.85 | $22,85 |
| 10 | $21.4 | $214,00 |
| 100 | $18.95 | $1.895,00 |
| 500 | $16.78 | $8.390,00 |
| 1.000 | $14.92 | $14.920,00 |
| 3.000 | $13.5 | $40.500,00 |
PIC32MZ2064DAK169T-I/HF Visão geral
A microcontroller (MCU) is a single-chip processor that integrates a CPU core, program memory (Flash), data memory (SRAM), and a rich set of peripherals including ADCs, communication interfaces, and timers. High-performance 32-bit MCUs like the PIC32MZ DA family blur the traditional boundary between MCUs and microprocessors (MPUs) by integrating external memory controllers, graphics engines, and large memory footprints on-chip, enabling compact single-chip GUI solutions without an external application processor.
Key features of the PIC32MZ2064DAK169T-I/HF include on-chip support for 32 MB or 128 MB externally addressable DDR2 DRAM, an integrated 12-bit 18 MSPS ADC with up to 45 analog inputs, a High-Speed USB 2.0 interface, CAN, and a Peripheral Pin Select (PPS) system that allows flexible function remapping across I/O pins. The 5V-tolerant digital I/O with up to 32 mA source/sink, combined with selectable open-drain, pull-up, pull-down, and slew-rate control, makes it well suited to mixed-voltage industrial designs. Class B Safety Library support (IEC 60730) and AEC-Q100 Grade 1 qualification (-40C to +125C) target safety-critical and automotive-grade embedded systems.
Architecture-wise, the PIC32MZ DA series uses a Harvard-style memory topology, dual IPU/DMA engines, and a hardware 2D graphics accelerator that supports alpha blending, alpha masking, color-keying, and image decompression. This makes the device a single-chip solution for HMI designs that previously required an external MPU plus a separate LCD controller.
Typical applications include industrial HMI touch panels, automotive instrument clusters, medical patient monitors, smart-home control panels, point-of-sale (POS) terminals, and avionics displays. Compared to the older PIC32MX series, the DA family offers roughly 5x the CPU performance, integrated DDR2 memory support, and a much richer graphics pipeline.
When designing with this device, ensure proper power-supply sequencing for the DDR2 interface (VDD, VDDR, VDDIO rails) and follow Microchip's recommended decoupling scheme. Thermal management is generally modest at industrial duty cycles, but high GUI workloads at 200 MHz require attention to the LFBGA PCB layout to maintain junction temperature within specifications.
This page synthesizes distributor pricing, same-family drop-in alternatives, and practical HMI design notes not found in the manufacturer datasheet alone.
Alternativas drop-in para PIC32MZ2064DAK169T-I/HF — mesmo encapsulamento, compatível pino a pino. Peças de encapsulamento diferente que exigem retrabalho na PCB são excluídas.
Variantes desta série
Modelos da mesma série compatíveis como drop-in com PIC32MZ2064DAK169T-I/HF (mesmo formato e footprint) — diferindo em Graphics Controller, USB, CAN, Core Architecture, External Memory Interface.
Ferramenta de comparação rápida — selecione peças alternativas para comparação lado a lado:
PIC32MZ2064DAK169-I/HF
✅ Drop-In✓ Em estoque
$12.8 / unidade
Ver ficha técnica →PIC32MZ1064DAK169-I/HF
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
PIC32MZ2064DAG169-V/6J
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
PIC32MZ2064DAK169T-I/HF Classificações máximas e características elétricas
| Core | MIPS32 microAptiv |
| Core Architecture | 32-bit RISC |
| Maximum CPU Frequency | 200 MHz |
| Program Flash | 2 MB (2M x 8) |
| SRAM | 640 KB |
| External Memory Interface | DDR2 DRAM, up to 128 MB addressable |
| Graphics Controller | Integrated (GPU + 2D accelerator) |
| ADC | 12-bit, 18 MSPS, up to 45 analog inputs |
| USB | High-Speed USB 2.0 |
| CAN | Yes (CAN 2.0) |
| Peripheral Pin Select (PPS) | Yes (function remap) |
| I/O Drive Strength | Up to 32 mA source/sink |
| I/O Voltage Tolerance | 5V tolerant |
| Encapsulamento | 169-LFBGA (11x11 mm) |
| Temperatura de operação | -40C to +85C (Industrial, 'I' grade) |
| Safety Library | Class B (IEC 60730) |
| Automotive Qualification | AEC-Q100 Grade 1 (per family datasheet) |
| Tipo de montagem | Surface Mount (BGA) |
| Status RoHS | Compliant |
Configuração de pinos do PIC32MZ2064DAK169T-I/HF
| Pino A1 | VSS — Ground reference |
| Pino A2 | DDQ_DDR2_DQ0 — DDR2 data lane bit 0 |
| Pino A3 | DDQ_DDR2_DQ1 — DDR2 data lane bit 1 |
| Pino A4 | DDQ_DDR2_DQ2 — DDR2 data lane bit 2 |
| Pino A5 | DDQ_DDR2_DQ3 — DDR2 data lane bit 3 |
| Pino A6 | VDD — Core logic supply |
| Pino A7 | RPB5 — General purpose I/O / PPS |
| Pino A8 | RPB6 — General purpose I/O / PPS |
| Pino A9 | RPB7 — General purpose I/O / PPS |
| Pino A10 | RPB8 — General purpose I/O / PPS |
| Pino A11 | RPB9 — General purpose I/O / PPS |
| Pino A12 | VSS — Ground reference |
| Pino B1 | DDQ_DDR2_DQ4 — DDR2 data lane bit 4 |
| Pino B2 | DDQ_DDR2_DQ5 — DDR2 data lane bit 5 |
| Pino B3 | DDQ_DDR2_DQ6 — DDR2 data lane bit 6 |
| Pino B4 | DDQ_DDR2_DQ7 — DDR2 data lane bit 7 |
| Pino B5 | VSS — Ground reference |
| Pino B6 | RPC1 — General purpose I/O / PPS |
| Pino B7 | RPC2 — General purpose I/O / PPS |
| Pino B8 | RPC3 — General purpose I/O / PPS |
| Pino B9 | RPC4 — General purpose I/O / PPS |
| Pino B10 | VDD — Core logic supply |
| Pino B11 | RPC5 — General purpose I/O / PPS |
| Pino B12 | RPC6 — General purpose I/O / PPS |
| Pino C1 | VDDR — DDR2 I/O supply |
| Pino C2 | VSS — Ground reference |
| Pino C3 | DDQ_DDR2_DQS — DDR2 data strobe |
| Pino C4 | DDQ_DDR2_DM — DDR2 data mask |
| Pino C5 | DDQ_DDR2_A0 — DDR2 address bit 0 |
| Pino C6 | DDQ_DDR2_A1 — DDR2 address bit 1 |
| Pino C7 | DDQ_DDR2_A2 — DDR2 address bit 2 |
| Pino C8 | DDQ_DDR2_A3 — DDR2 address bit 3 |
| Pino C9 | DDQ_DDR2_A4 — DDR2 address bit 4 |
| Pino C10 | DDQ_DDR2_A5 — DDR2 address bit 5 |
| Pino C11 | DDQ_DDR2_A6 — DDR2 address bit 6 |
| Pino C12 | DDQ_DDR2_A7 — DDR2 address bit 7 |
| Pino D1 | DDQ_DDR2_BA0 — DDR2 bank address 0 |
| Pino D2 | DDQ_DDR2_BA1 — DDR2 bank address 1 |
| Pino D3 | DDQ_DDR2_BA2 — DDR2 bank address 2 |
| Pino D4 | DDQ_DDR2_CKE — DDR2 clock enable |
| Pino D5 | DDQ_DDR2_CLK_N — DDR2 differential clock negative |
| Pino D6 | DDQ_DDR2_CLK_P — DDR2 differential clock positive |
| Pino D7 | DDQ_DDR2_CS_N — DDR2 chip select (active low) |
| Pino D8 | DDQ_DDR2_RAS_N — DDR2 row address strobe (active low) |
| Pino D9 | DDQ_DDR2_CAS_N — DDR2 column address strobe (active low) |
| Pino D10 | DDQ_DDR2_WE_N — DDR2 write enable (active low) |
| Pino D11 | DDQ_DDR2_ODT — DDR2 on-die termination control |
| Pino D12 | VDDR — DDR2 I/O supply |
| Pino E1 | VSS — Ground reference |
| Pino E2 | RPG6 — General purpose I/O / PPS |
| Pino E3 | RPG7 — General purpose I/O / PPS |
| Pino E4 | RPG8 — General purpose I/O / PPS |
| Pino E5 | RPG9 — General purpose I/O / PPS |
| Pino E6 | VDD — Core logic supply |
| Pino E7 | VDD — Core logic supply |
| Pino E8 | AN0 — Analog input 0 (12-bit ADC) |
| Pino E9 | AN1 — Analog input 1 (12-bit ADC) |
| Pino E10 | AN2 — Analog input 2 (12-bit ADC) |
| Pino E11 | AN3 — Analog input 3 (12-bit ADC) |
| Pino E12 | VSS — Ground reference |
| Pino F1 | AVDD — Analog supply |
| Pino F2 | AVSS — Analog ground |
| Pino F3 | RPG0 — General purpose I/O / PPS |
| Pino F4 | RPG1 — General purpose I/O / PPS |
| Pino F5 | RPG2 — General purpose I/O / PPS |
| Pino F6 | VDD — Core logic supply |
| Pino F7 | VSS — Ground reference |
| Pino F8 | AN4 — Analog input 4 (12-bit ADC) |
| Pino F9 | AN5 — Analog input 5 (12-bit ADC) |
| Pino F10 | AN6 — Analog input 6 (12-bit ADC) |
| Pino F11 | AN7 — Analog input 7 (12-bit ADC) |
| Pino F12 | AN8 — Analog input 8 (12-bit ADC) |
| Pino G1 | VDD — Core logic supply |
| Pino G2 | RPF0 — General purpose I/O / PPS |
| Pino G3 | RPF1 — General purpose I/O / PPS |
| Pino G4 | RPF2 — General purpose I/O / PPS |
| Pino G5 | RPF3 — General purpose I/O / PPS |
| Pino G6 | VSS — Ground reference |
| Pino G7 | VDD — Core logic supply |
| Pino G8 | AN9 — Analog input 9 (12-bit ADC) |
| Pino G9 | AN10 — Analog input 10 (12-bit ADC) |
| Pino G10 | AN11 — Analog input 11 (12-bit ADC) |
| Pino G11 | AN12 — Analog input 12 (12-bit ADC) |
| Pino G12 | VREF+ — ADC positive voltage reference |
| Pino H1 | RPF4 — General purpose I/O / PPS |
| Pino H2 | RPF5 — General purpose I/O / PPS |
| Pino H3 | RPF6 — General purpose I/O / PPS |
| Pino H4 | RPF7 — General purpose I/O / PPS |
| Pino H5 | RPF8 — General purpose I/O / PPS |
| Pino H6 | VDD — Core logic supply |
| Pino H7 | VSS — Ground reference |
| Pino H8 | AN13 — Analog input 13 (12-bit ADC) |
| Pino H9 | AN14 — Analog input 14 (12-bit ADC) |
| Pino H10 | AN15 — Analog input 15 (12-bit ADC) |
| Pino H11 | AN16 — Analog input 16 (12-bit ADC) |
| Pino H12 | VREF- — ADC negative voltage reference |
| Pino J1 | RPE0 — General purpose I/O / PPS |
| Pino J2 | RPE1 — General purpose I/O / PPS |
| Pino J3 | RPE2 — General purpose I/O / PPS |
| Pino J4 | RPE3 — General purpose I/O / PPS |
| Pino J5 | RPE4 — General purpose I/O / PPS |
| Pino J6 | VSS — Ground reference |
| Pino J7 | VDD — Core logic supply |
| Pino J8 | AN17 — Analog input 17 (12-bit ADC) |
| Pino J9 | AN18 — Analog input 18 (12-bit ADC) |
| Pino J10 | AN19 — Analog input 19 (12-bit ADC) |
| Pino J11 | AN20 — Analog input 20 (12-bit ADC) |
| Pino J12 | AVSS — Analog ground |
| Pino K1 | VDD — Core logic supply |
| Pino K2 | RPD0 — General purpose I/O / PPS |
| Pino K3 | RPD1 — General purpose I/O / PPS |
| Pino K4 | RPD2 — General purpose I/O / PPS |
| Pino K5 | RPD3 — General purpose I/O / PPS |
| Pino K6 | VDD — Core logic supply |
| Pino K7 | VSS — Ground reference |
| Pino K8 | AN21 — Analog input 21 (12-bit ADC) |
| Pino K9 | AN22 — Analog input 22 (12-bit ADC) |
| Pino K10 | AN23 — Analog input 23 (12-bit ADC) |
| Pino K11 | AN24 — Analog input 24 (12-bit ADC) |
| Pino K12 | AVDD — Analog supply |
| Pino L1 | RPD4 — General purpose I/O / PPS |
| Pino L2 | RPD5 — General purpose I/O / PPS |
| Pino L3 | RPD6 — General purpose I/O / PPS |
| Pino L4 | RPD7 — General purpose I/O / PPS |
| Pino L5 | RPD8 — General purpose I/O / PPS |
| Pino L6 | VSS — Ground reference |
| Pino L7 | VDD — Core logic supply |
| Pino L8 | AN25 — Analog input 25 (12-bit ADC) |
| Pino L9 | AN26 — Analog input 26 (12-bit ADC) |
| Pino L10 | AN27 — Analog input 27 (12-bit ADC) |
| Pino L11 | AN28 — Analog input 28 (12-bit ADC) |
| Pino L12 | VSS — Ground reference |
| Pino M1 | VDD — Core logic supply |
| Pino M2 | RPA0 — General purpose I/O / PPS |
| Pino M3 | RPA1 — General purpose I/O / PPS |
| Pino M4 | RPA2 — General purpose I/O / PPS |
| Pino M5 | RPA3 — General purpose I/O / PPS |
| Pino M6 | RPA4 — General purpose I/O / PPS |
| Pino M7 | RPA5 — General purpose I/O / PPS |
| Pino M8 | RPA6 — General purpose I/O / PPS |
| Pino M9 | RPA7 — General purpose I/O / PPS |
| Pino M10 | RPA8 — General purpose I/O / PPS |
| Pino M11 | AN29 — Analog input 29 (12-bit ADC) |
| Pino M12 | VDD — Core logic supply |
| Pino N1 | OSC1 — Primary oscillator input |
| Pino N2 | OSC2 — Primary oscillator output |
| Pino N3 | SOSC1 — Secondary oscillator input (32.768 kHz) |
| Pino N4 | SOSC2 — Secondary oscillator output |
| Pino N5 | MCLR — Master clear reset (active low) |
| Pino N6 | VDD — Core logic supply |
| Pino N7 | VSS — Ground reference |
| Pino N8 | RPA9 — General purpose I/O / PPS |
| Pino N9 | RPA10 — General purpose I/O / PPS |
| Pino N10 | RPA11 — General purpose I/O / PPS |
| Pino N11 | AN30 — Analog input 30 (12-bit ADC) |
| Pino N12 | AN31 — Analog input 31 (12-bit ADC) |
| Pino P1 | RPK0 — General purpose I/O / PPS |
| Pino P2 | RPK1 — General purpose I/O / PPS |
| Pino P3 | RPK2 — General purpose I/O / PPS |
| Pino P4 | RPK3 — General purpose I/O / PPS |
| Pino P5 | RPK4 — General purpose I/O / PPS |
| Pino P6 | VDD — Core logic supply |
| Pino P7 | VSS — Ground reference |
| Pino P8 | USBID — USB OTG ID pin |
| Pino P9 | VBUS — USB VBUS sense (5V input) |
| Pino P10 | D+ — USB D+ data line |
| Pino P11 | D- — USB D- data line |
| Pino P12 | VUSB — USB transceiver supply |
| Pino R1 | RPK5 — General purpose I/O / PPS |
| Pino R2 | RPK6 — General purpose I/O / PPS |
| Pino R3 | RPK7 — General purpose I/O / PPS |
| Pino R4 | RPK8 — General purpose I/O / PPS |
| Pino R5 | VDD — Core logic supply |
| Pino R6 | RPJ0 — General purpose I/O / PPS |
| Pino R7 | RPJ1 — General purpose I/O / PPS |
| Pino R8 | RPJ2 — General purpose I/O / PPS |
| Pino R9 | RPJ3 — General purpose I/O / PPS |
| Pino R10 | RPJ4 — General purpose I/O / PPS |
| Pino R11 | RPJ5 — General purpose I/O / PPS |
| Pino R12 | RPJ6 — General purpose I/O / PPS |
Aplicações típicas
PIC32MZ2064DAK169T-I/HF é adequado para 6 aplicaçãos: Industrial HMI Touch Panels, Automotive Instrument Clusters, Medical Patient Monitors, Smart Home Control Panels, Point-of-Sale (POS) Terminals, Avionics Displays.
Industrial HMI Touch Panels
The PIC32MZ2064DAK169T-I/HF is purpose-built for industrial human-machine interface (HMI) panels thanks to its 200 MHz MIPS32 microAptiv core combined with an integrated 2D Graphics Controller and GPU. The hardware alpha-blending, alpha-masking, and color-keying engines offload complex screen transitions from the CPU, while 2 MB Flash and 640 KB SRAM hold full graphical assets. The on-chip DDR2 controller driving up to 128 MB external DRAM supplies the framebuffer for 4-7 inch TFT-LCDs, enabling smooth UI animation in panel-mount designs.
Recomendado
Automotive Instrument Clusters
AEC-Q100 Grade 1 qualification (per Microchip's family datasheet) makes the PIC32MZ2064DAK169T-I/HF well suited to automotive instrument clusters that drive TFT-LCD or segmented displays behind the steering wheel. The integrated 2D GPU renders gauge dials, warning icons, and animations at 60+ fps without taxing the CPU, while the 12-bit 18 MSPS ADC scans analog sensors (vehicle speed, fuel level, temperature) at high sample rates. CAN 2.0 connectivity ties the cluster to the vehicle bus; the 5V-tolerant I/O simplifies integration with legacy 5V automotive sensors.
Recomendado
Medical Patient Monitors
The PIC32MZ2064DAK169T-I/HF's 12-bit 18 MSPS ADC with up to 45 analog inputs allows direct connection to multiple physiological sensors (ECG, SpO2, temperature, respiration), reducing external signal-chain cost in patient monitors. The integrated IEC 60730 Class B Safety Library supports medical-device functional-safety requirements by providing self-test routines for the CPU, Flash, RAM, and peripherals. Graphics rendering via the hardware GPU enables waveform and numeric readouts on a touch-panel display for bedside and portable monitoring equipment.
Recomendado
Smart Home Control Panels
Wi-Fi-connected smart-home control panels benefit from the PIC32MZ2064DAK169T-I/HF's 200 MHz CPU, integrated graphics engine, and High-Speed USB 2.0 for firmware updates. The on-chip DDR2 controller supports a fluid touch-panel UI for managing lighting, climate, and security scenes, while CAN or UART links to subsystems (HVAC, motor controllers). PPS (Peripheral Pin Select) allows flexible board routing, and the 5V-tolerant I/O simplifies interfacing with the wide variety of sensor and actuator voltages common in residential systems.
Recomendado
Point-of-Sale (POS) Terminals
POS terminals demand secure transactions, color touchscreens, and multiple peripheral interfaces, all of which the PIC32MZ2064DAK169T-I/HF can address. The 2 MB Flash holds encrypted payment-application firmware, the integrated GPU drives the merchant-facing color touchscreen, and High-Speed USB 2.0 supports peripherals like printers and barcode scanners. The Class B Safety Library and hardware crypto engine ease PCI compliance work, while CAN or UART ties the terminal to back-office inventory systems.
Recomendado
Avionics Displays
The PIC32MZ2064DAK169T-I/HF's industrial operating temperature range (-40C to +85C for the 'I' grade) and integrated graphics pipeline make it suitable for secondary avionics displays (engine instruments, navigation maps, system-status panels). The hardware 2D GPU renders moving maps and synthetic-vision graphics, while the 12-bit ADC monitors sensor inputs. CAN 2.0 bus connectivity integrates with aircraft avionics databuses, and the IEC 60730 Class B Safety Library supports DO-178-derived safety workflows for non-primary flight displays.
Recomendado
Resumo dos produtos recomendados
Dados de referência de engenharia para PIC32MZ2064DAK169T-I/HF — comparação, orientação de projeto e informações de conformidade.
Guia de seleção
Comparação com alternativas
| Parâmetro | Este produto | PIC32MZ2064DAK169-I/HF | PIC32MZ1064DAK169-I/HF |
|---|---|---|---|
| Package | 169-LFBGA (11x11 mm) | 169-LFBGA (11x11 mm) - same | 169-LFBGA (11x11 mm) - same |
| Brand | Microchip Technology | Microchip Technology - same | Microchip Technology - same |
| Core | MIPS32 microAptiv @ 200 MHz | MIPS32 microAptiv @ 200 MHz - same | MIPS32 microAptiv @ 200 MHz - same |
| Flash | 2 MB | 2 MB - same | 1 MB (-50%) |
| SRAM | 640 KB | 640 KB - same | 640 KB - same |
| Graphics Controller | Integrated (2D GPU) | Integrated (2D GPU) - same | Integrated (2D GPU) - same |
| Operating Temperature | -40C to +85C (Industrial) | -40C to +85C (Industrial) - same | -40C to +85C (Industrial) - same |
| Packaging | Tape & Reel ('-T') | Tray (no '-T') | Tray (no '-T') |
| Family Compatibility | PIC32MZ DAK 169-LFBGA | Same family, 169-LFBGA | Same family, 169-LFBGA |
Principais diferenciais
- On-chip DDR2 controller with hardware GPU (vs PIC32MZ2064DAK169-I/HF)
- Highest-density Flash in PIC32MZ DA family (vs PIC32MZ1064DAK169-I/HF)
- Class B Safety Library + AEC-Q100 Grade 1 in single device (vs STM32F769NIH6)
Notas de projeto
The PIC32MZ2064DAK169T-I/HF requires multiple supply rails: VDD (core 1.8-3.3V), VDDR (DDR2 I/O 1.8V), VDDIO (digital I/O), AVDD/AVSS (analog), and VUSB (USB 3.3V). Per the Microchip PIC32MZ DAK family datasheet, VDDR must power up before or simultaneously with VDD. Recommended decoupling: 100 nF + 4.7 uF ceramic on every VDD pin, plus 10 uF bulk near the IC. Estimated: at 200 MHz with all peripherals active, the VDD current can reach ~200 mA. A 3.3V LDO with at least 500 mA capacity is recommended upstream.
The 169-LFBGA package has a 0.8 mm ball pitch. Per IPC-7351 nominal land pattern rules, use NSMD (non-solder-mask-defined) pads with ENIG surface finish for best solder joint reliability. Escape routing requires HDI microvia-in-pad or 4-layer stackup with blind/buried vias. Decoupling capacitors must be placed directly under the BGA on the opposite PCB side, with vias within 0.5 mm of the pad edge. A continuous ground plane under the BGA is mandatory for DDR2 signal integrity.
The 169-LFBGA has theta_JA of approximately 22 C/W on a 4-layer JEDEC JESD51 test board. Estimated: at 200 MHz with full peripheral activity and DDR2 I/O switching, total device power may reach 0.7-1.0 W, yielding a ~22 C junction temperature rise above ambient. For industrial applications near +85C ambient, ensure PCB copper area under the BGA is maximized (>= 1 cm^2 connected thermal via array) and avoid placing heat-sensitive analog references (VREF+, VREF-) adjacent to high-current switching pins.
Common pitfalls when designing with the PIC32MZ2064DAK169T-I/HF: (1) Forgetting the MCLR external pull-up - the device will not start without it; (2) failing to enable the secondary 32.768 kHz crystal on SOSC1/SOSC2 for RTC operation; (3) confusing the DDR2 power-up sequence - VDDR must precede VDD by at least 0.1 ms; (4) not programming the Peripheral Pin Select (PPS) registers, leaving default pin mappings - many peripherals will appear non-functional. Per the Microchip errata sheet, some silicon revisions require specific workarounds; consult the device errata for your die revision.
Informações de conformidade
RoHS and REACH compliant per Microchip product page. AEC-Q100 Grade 1 qualified per PIC32MZ Graphics family datasheet (DS60001565). Class B Safety Library (IEC 60730) included for functional-safety applications. Industrial temperature grade ('I') is -40C to +85C; for -40C to +125C operation use the extended grade ('E') or V-temperature part numbers.