PIC32MZ2064DAK169T-I/HF - 200MHz 32-bit MCU w/ 2MB Flash & Graphics | Microchip
Référence : PIC32MZ2064DAK169T-I/HF ✓ Actif| Qté | Prix unitaire | Total |
|---|---|---|
| 1 | $22.85 | $22,85 |
| 10 | $21.4 | $214,00 |
| 100 | $18.95 | $1 895,00 |
| 500 | $16.78 | $8 390,00 |
| 1 000 | $14.92 | $14 920,00 |
| 3 000 | $13.5 | $40 500,00 |
PIC32MZ2064DAK169T-I/HF Présentation
A microcontroller (MCU) is a single-chip processor that integrates a CPU core, program memory (Flash), data memory (SRAM), and a rich set of peripherals including ADCs, communication interfaces, and timers. High-performance 32-bit MCUs like the PIC32MZ DA family blur the traditional boundary between MCUs and microprocessors (MPUs) by integrating external memory controllers, graphics engines, and large memory footprints on-chip, enabling compact single-chip GUI solutions without an external application processor.
Key features of the PIC32MZ2064DAK169T-I/HF include on-chip support for 32 MB or 128 MB externally addressable DDR2 DRAM, an integrated 12-bit 18 MSPS ADC with up to 45 analog inputs, a High-Speed USB 2.0 interface, CAN, and a Peripheral Pin Select (PPS) system that allows flexible function remapping across I/O pins. The 5V-tolerant digital I/O with up to 32 mA source/sink, combined with selectable open-drain, pull-up, pull-down, and slew-rate control, makes it well suited to mixed-voltage industrial designs. Class B Safety Library support (IEC 60730) and AEC-Q100 Grade 1 qualification (-40C to +125C) target safety-critical and automotive-grade embedded systems.
Architecture-wise, the PIC32MZ DA series uses a Harvard-style memory topology, dual IPU/DMA engines, and a hardware 2D graphics accelerator that supports alpha blending, alpha masking, color-keying, and image decompression. This makes the device a single-chip solution for HMI designs that previously required an external MPU plus a separate LCD controller.
Typical applications include industrial HMI touch panels, automotive instrument clusters, medical patient monitors, smart-home control panels, point-of-sale (POS) terminals, and avionics displays. Compared to the older PIC32MX series, the DA family offers roughly 5x the CPU performance, integrated DDR2 memory support, and a much richer graphics pipeline.
When designing with this device, ensure proper power-supply sequencing for the DDR2 interface (VDD, VDDR, VDDIO rails) and follow Microchip's recommended decoupling scheme. Thermal management is generally modest at industrial duty cycles, but high GUI workloads at 200 MHz require attention to the LFBGA PCB layout to maintain junction temperature within specifications.
This page synthesizes distributor pricing, same-family drop-in alternatives, and practical HMI design notes not found in the manufacturer datasheet alone.
Alternatives de remplacement direct pour PIC32MZ2064DAK169T-I/HF — même boîtier, compatible broche à broche. Les références à boîtier différent nécessitant une retouche du PCB sont exclues.
Variantes de cette série
Modèles de la même série directement compatibles avec PIC32MZ2064DAK169T-I/HF (même facteur de forme et même empreinte) — différant par Graphics Controller, USB, CAN, Core Architecture, External Memory Interface.
Outil de comparaison rapide — sélectionnez des références alternatives pour une comparaison côte à côte :
PIC32MZ2064DAK169-I/HF
✅ Remplacement direct✓ En stock
$12.8 / unité
Voir la fiche technique →PIC32MZ1064DAK169-I/HF
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
PIC32MZ2064DAG169-V/6J
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
PIC32MZ2064DAK169T-I/HF Valeurs maximales et caractéristiques électriques
| Core | MIPS32 microAptiv |
| Core Architecture | 32-bit RISC |
| Maximum CPU Frequency | 200 MHz |
| Program Flash | 2 MB (2M x 8) |
| SRAM | 640 KB |
| External Memory Interface | DDR2 DRAM, up to 128 MB addressable |
| Graphics Controller | Integrated (GPU + 2D accelerator) |
| ADC | 12-bit, 18 MSPS, up to 45 analog inputs |
| USB | High-Speed USB 2.0 |
| CAN | Yes (CAN 2.0) |
| Peripheral Pin Select (PPS) | Yes (function remap) |
| I/O Drive Strength | Up to 32 mA source/sink |
| I/O Voltage Tolerance | 5V tolerant |
| Boîtier | 169-LFBGA (11x11 mm) |
| Température de fonctionnement | -40C to +85C (Industrial, 'I' grade) |
| Safety Library | Class B (IEC 60730) |
| Automotive Qualification | AEC-Q100 Grade 1 (per family datasheet) |
| Type de montage | Surface Mount (BGA) |
| Statut RoHS | Compliant |
Configuration des broches de PIC32MZ2064DAK169T-I/HF
| Broche A1 | VSS — Ground reference |
| Broche A2 | DDQ_DDR2_DQ0 — DDR2 data lane bit 0 |
| Broche A3 | DDQ_DDR2_DQ1 — DDR2 data lane bit 1 |
| Broche A4 | DDQ_DDR2_DQ2 — DDR2 data lane bit 2 |
| Broche A5 | DDQ_DDR2_DQ3 — DDR2 data lane bit 3 |
| Broche A6 | VDD — Core logic supply |
| Broche A7 | RPB5 — General purpose I/O / PPS |
| Broche A8 | RPB6 — General purpose I/O / PPS |
| Broche A9 | RPB7 — General purpose I/O / PPS |
| Broche A10 | RPB8 — General purpose I/O / PPS |
| Broche A11 | RPB9 — General purpose I/O / PPS |
| Broche A12 | VSS — Ground reference |
| Broche B1 | DDQ_DDR2_DQ4 — DDR2 data lane bit 4 |
| Broche B2 | DDQ_DDR2_DQ5 — DDR2 data lane bit 5 |
| Broche B3 | DDQ_DDR2_DQ6 — DDR2 data lane bit 6 |
| Broche B4 | DDQ_DDR2_DQ7 — DDR2 data lane bit 7 |
| Broche B5 | VSS — Ground reference |
| Broche B6 | RPC1 — General purpose I/O / PPS |
| Broche B7 | RPC2 — General purpose I/O / PPS |
| Broche B8 | RPC3 — General purpose I/O / PPS |
| Broche B9 | RPC4 — General purpose I/O / PPS |
| Broche B10 | VDD — Core logic supply |
| Broche B11 | RPC5 — General purpose I/O / PPS |
| Broche B12 | RPC6 — General purpose I/O / PPS |
| Broche C1 | VDDR — DDR2 I/O supply |
| Broche C2 | VSS — Ground reference |
| Broche C3 | DDQ_DDR2_DQS — DDR2 data strobe |
| Broche C4 | DDQ_DDR2_DM — DDR2 data mask |
| Broche C5 | DDQ_DDR2_A0 — DDR2 address bit 0 |
| Broche C6 | DDQ_DDR2_A1 — DDR2 address bit 1 |
| Broche C7 | DDQ_DDR2_A2 — DDR2 address bit 2 |
| Broche C8 | DDQ_DDR2_A3 — DDR2 address bit 3 |
| Broche C9 | DDQ_DDR2_A4 — DDR2 address bit 4 |
| Broche C10 | DDQ_DDR2_A5 — DDR2 address bit 5 |
| Broche C11 | DDQ_DDR2_A6 — DDR2 address bit 6 |
| Broche C12 | DDQ_DDR2_A7 — DDR2 address bit 7 |
| Broche D1 | DDQ_DDR2_BA0 — DDR2 bank address 0 |
| Broche D2 | DDQ_DDR2_BA1 — DDR2 bank address 1 |
| Broche D3 | DDQ_DDR2_BA2 — DDR2 bank address 2 |
| Broche D4 | DDQ_DDR2_CKE — DDR2 clock enable |
| Broche D5 | DDQ_DDR2_CLK_N — DDR2 differential clock negative |
| Broche D6 | DDQ_DDR2_CLK_P — DDR2 differential clock positive |
| Broche D7 | DDQ_DDR2_CS_N — DDR2 chip select (active low) |
| Broche D8 | DDQ_DDR2_RAS_N — DDR2 row address strobe (active low) |
| Broche D9 | DDQ_DDR2_CAS_N — DDR2 column address strobe (active low) |
| Broche D10 | DDQ_DDR2_WE_N — DDR2 write enable (active low) |
| Broche D11 | DDQ_DDR2_ODT — DDR2 on-die termination control |
| Broche D12 | VDDR — DDR2 I/O supply |
| Broche E1 | VSS — Ground reference |
| Broche E2 | RPG6 — General purpose I/O / PPS |
| Broche E3 | RPG7 — General purpose I/O / PPS |
| Broche E4 | RPG8 — General purpose I/O / PPS |
| Broche E5 | RPG9 — General purpose I/O / PPS |
| Broche E6 | VDD — Core logic supply |
| Broche E7 | VDD — Core logic supply |
| Broche E8 | AN0 — Analog input 0 (12-bit ADC) |
| Broche E9 | AN1 — Analog input 1 (12-bit ADC) |
| Broche E10 | AN2 — Analog input 2 (12-bit ADC) |
| Broche E11 | AN3 — Analog input 3 (12-bit ADC) |
| Broche E12 | VSS — Ground reference |
| Broche F1 | AVDD — Analog supply |
| Broche F2 | AVSS — Analog ground |
| Broche F3 | RPG0 — General purpose I/O / PPS |
| Broche F4 | RPG1 — General purpose I/O / PPS |
| Broche F5 | RPG2 — General purpose I/O / PPS |
| Broche F6 | VDD — Core logic supply |
| Broche F7 | VSS — Ground reference |
| Broche F8 | AN4 — Analog input 4 (12-bit ADC) |
| Broche F9 | AN5 — Analog input 5 (12-bit ADC) |
| Broche F10 | AN6 — Analog input 6 (12-bit ADC) |
| Broche F11 | AN7 — Analog input 7 (12-bit ADC) |
| Broche F12 | AN8 — Analog input 8 (12-bit ADC) |
| Broche G1 | VDD — Core logic supply |
| Broche G2 | RPF0 — General purpose I/O / PPS |
| Broche G3 | RPF1 — General purpose I/O / PPS |
| Broche G4 | RPF2 — General purpose I/O / PPS |
| Broche G5 | RPF3 — General purpose I/O / PPS |
| Broche G6 | VSS — Ground reference |
| Broche G7 | VDD — Core logic supply |
| Broche G8 | AN9 — Analog input 9 (12-bit ADC) |
| Broche G9 | AN10 — Analog input 10 (12-bit ADC) |
| Broche G10 | AN11 — Analog input 11 (12-bit ADC) |
| Broche G11 | AN12 — Analog input 12 (12-bit ADC) |
| Broche G12 | VREF+ — ADC positive voltage reference |
| Broche H1 | RPF4 — General purpose I/O / PPS |
| Broche H2 | RPF5 — General purpose I/O / PPS |
| Broche H3 | RPF6 — General purpose I/O / PPS |
| Broche H4 | RPF7 — General purpose I/O / PPS |
| Broche H5 | RPF8 — General purpose I/O / PPS |
| Broche H6 | VDD — Core logic supply |
| Broche H7 | VSS — Ground reference |
| Broche H8 | AN13 — Analog input 13 (12-bit ADC) |
| Broche H9 | AN14 — Analog input 14 (12-bit ADC) |
| Broche H10 | AN15 — Analog input 15 (12-bit ADC) |
| Broche H11 | AN16 — Analog input 16 (12-bit ADC) |
| Broche H12 | VREF- — ADC negative voltage reference |
| Broche J1 | RPE0 — General purpose I/O / PPS |
| Broche J2 | RPE1 — General purpose I/O / PPS |
| Broche J3 | RPE2 — General purpose I/O / PPS |
| Broche J4 | RPE3 — General purpose I/O / PPS |
| Broche J5 | RPE4 — General purpose I/O / PPS |
| Broche J6 | VSS — Ground reference |
| Broche J7 | VDD — Core logic supply |
| Broche J8 | AN17 — Analog input 17 (12-bit ADC) |
| Broche J9 | AN18 — Analog input 18 (12-bit ADC) |
| Broche J10 | AN19 — Analog input 19 (12-bit ADC) |
| Broche J11 | AN20 — Analog input 20 (12-bit ADC) |
| Broche J12 | AVSS — Analog ground |
| Broche K1 | VDD — Core logic supply |
| Broche K2 | RPD0 — General purpose I/O / PPS |
| Broche K3 | RPD1 — General purpose I/O / PPS |
| Broche K4 | RPD2 — General purpose I/O / PPS |
| Broche K5 | RPD3 — General purpose I/O / PPS |
| Broche K6 | VDD — Core logic supply |
| Broche K7 | VSS — Ground reference |
| Broche K8 | AN21 — Analog input 21 (12-bit ADC) |
| Broche K9 | AN22 — Analog input 22 (12-bit ADC) |
| Broche K10 | AN23 — Analog input 23 (12-bit ADC) |
| Broche K11 | AN24 — Analog input 24 (12-bit ADC) |
| Broche K12 | AVDD — Analog supply |
| Broche L1 | RPD4 — General purpose I/O / PPS |
| Broche L2 | RPD5 — General purpose I/O / PPS |
| Broche L3 | RPD6 — General purpose I/O / PPS |
| Broche L4 | RPD7 — General purpose I/O / PPS |
| Broche L5 | RPD8 — General purpose I/O / PPS |
| Broche L6 | VSS — Ground reference |
| Broche L7 | VDD — Core logic supply |
| Broche L8 | AN25 — Analog input 25 (12-bit ADC) |
| Broche L9 | AN26 — Analog input 26 (12-bit ADC) |
| Broche L10 | AN27 — Analog input 27 (12-bit ADC) |
| Broche L11 | AN28 — Analog input 28 (12-bit ADC) |
| Broche L12 | VSS — Ground reference |
| Broche M1 | VDD — Core logic supply |
| Broche M2 | RPA0 — General purpose I/O / PPS |
| Broche M3 | RPA1 — General purpose I/O / PPS |
| Broche M4 | RPA2 — General purpose I/O / PPS |
| Broche M5 | RPA3 — General purpose I/O / PPS |
| Broche M6 | RPA4 — General purpose I/O / PPS |
| Broche M7 | RPA5 — General purpose I/O / PPS |
| Broche M8 | RPA6 — General purpose I/O / PPS |
| Broche M9 | RPA7 — General purpose I/O / PPS |
| Broche M10 | RPA8 — General purpose I/O / PPS |
| Broche M11 | AN29 — Analog input 29 (12-bit ADC) |
| Broche M12 | VDD — Core logic supply |
| Broche N1 | OSC1 — Primary oscillator input |
| Broche N2 | OSC2 — Primary oscillator output |
| Broche N3 | SOSC1 — Secondary oscillator input (32.768 kHz) |
| Broche N4 | SOSC2 — Secondary oscillator output |
| Broche N5 | MCLR — Master clear reset (active low) |
| Broche N6 | VDD — Core logic supply |
| Broche N7 | VSS — Ground reference |
| Broche N8 | RPA9 — General purpose I/O / PPS |
| Broche N9 | RPA10 — General purpose I/O / PPS |
| Broche N10 | RPA11 — General purpose I/O / PPS |
| Broche N11 | AN30 — Analog input 30 (12-bit ADC) |
| Broche N12 | AN31 — Analog input 31 (12-bit ADC) |
| Broche P1 | RPK0 — General purpose I/O / PPS |
| Broche P2 | RPK1 — General purpose I/O / PPS |
| Broche P3 | RPK2 — General purpose I/O / PPS |
| Broche P4 | RPK3 — General purpose I/O / PPS |
| Broche P5 | RPK4 — General purpose I/O / PPS |
| Broche P6 | VDD — Core logic supply |
| Broche P7 | VSS — Ground reference |
| Broche P8 | USBID — USB OTG ID pin |
| Broche P9 | VBUS — USB VBUS sense (5V input) |
| Broche P10 | D+ — USB D+ data line |
| Broche P11 | D- — USB D- data line |
| Broche P12 | VUSB — USB transceiver supply |
| Broche R1 | RPK5 — General purpose I/O / PPS |
| Broche R2 | RPK6 — General purpose I/O / PPS |
| Broche R3 | RPK7 — General purpose I/O / PPS |
| Broche R4 | RPK8 — General purpose I/O / PPS |
| Broche R5 | VDD — Core logic supply |
| Broche R6 | RPJ0 — General purpose I/O / PPS |
| Broche R7 | RPJ1 — General purpose I/O / PPS |
| Broche R8 | RPJ2 — General purpose I/O / PPS |
| Broche R9 | RPJ3 — General purpose I/O / PPS |
| Broche R10 | RPJ4 — General purpose I/O / PPS |
| Broche R11 | RPJ5 — General purpose I/O / PPS |
| Broche R12 | RPJ6 — General purpose I/O / PPS |
Applications typiques
PIC32MZ2064DAK169T-I/HF convient pour 6 applications: Industrial HMI Touch Panels, Automotive Instrument Clusters, Medical Patient Monitors, Smart Home Control Panels, Point-of-Sale (POS) Terminals, Avionics Displays.
Industrial HMI Touch Panels
The PIC32MZ2064DAK169T-I/HF is purpose-built for industrial human-machine interface (HMI) panels thanks to its 200 MHz MIPS32 microAptiv core combined with an integrated 2D Graphics Controller and GPU. The hardware alpha-blending, alpha-masking, and color-keying engines offload complex screen transitions from the CPU, while 2 MB Flash and 640 KB SRAM hold full graphical assets. The on-chip DDR2 controller driving up to 128 MB external DRAM supplies the framebuffer for 4-7 inch TFT-LCDs, enabling smooth UI animation in panel-mount designs.
Recommandé
Automotive Instrument Clusters
AEC-Q100 Grade 1 qualification (per Microchip's family datasheet) makes the PIC32MZ2064DAK169T-I/HF well suited to automotive instrument clusters that drive TFT-LCD or segmented displays behind the steering wheel. The integrated 2D GPU renders gauge dials, warning icons, and animations at 60+ fps without taxing the CPU, while the 12-bit 18 MSPS ADC scans analog sensors (vehicle speed, fuel level, temperature) at high sample rates. CAN 2.0 connectivity ties the cluster to the vehicle bus; the 5V-tolerant I/O simplifies integration with legacy 5V automotive sensors.
Recommandé
Medical Patient Monitors
The PIC32MZ2064DAK169T-I/HF's 12-bit 18 MSPS ADC with up to 45 analog inputs allows direct connection to multiple physiological sensors (ECG, SpO2, temperature, respiration), reducing external signal-chain cost in patient monitors. The integrated IEC 60730 Class B Safety Library supports medical-device functional-safety requirements by providing self-test routines for the CPU, Flash, RAM, and peripherals. Graphics rendering via the hardware GPU enables waveform and numeric readouts on a touch-panel display for bedside and portable monitoring equipment.
Recommandé
Smart Home Control Panels
Wi-Fi-connected smart-home control panels benefit from the PIC32MZ2064DAK169T-I/HF's 200 MHz CPU, integrated graphics engine, and High-Speed USB 2.0 for firmware updates. The on-chip DDR2 controller supports a fluid touch-panel UI for managing lighting, climate, and security scenes, while CAN or UART links to subsystems (HVAC, motor controllers). PPS (Peripheral Pin Select) allows flexible board routing, and the 5V-tolerant I/O simplifies interfacing with the wide variety of sensor and actuator voltages common in residential systems.
Recommandé
Point-of-Sale (POS) Terminals
POS terminals demand secure transactions, color touchscreens, and multiple peripheral interfaces, all of which the PIC32MZ2064DAK169T-I/HF can address. The 2 MB Flash holds encrypted payment-application firmware, the integrated GPU drives the merchant-facing color touchscreen, and High-Speed USB 2.0 supports peripherals like printers and barcode scanners. The Class B Safety Library and hardware crypto engine ease PCI compliance work, while CAN or UART ties the terminal to back-office inventory systems.
Recommandé
Avionics Displays
The PIC32MZ2064DAK169T-I/HF's industrial operating temperature range (-40C to +85C for the 'I' grade) and integrated graphics pipeline make it suitable for secondary avionics displays (engine instruments, navigation maps, system-status panels). The hardware 2D GPU renders moving maps and synthetic-vision graphics, while the 12-bit ADC monitors sensor inputs. CAN 2.0 bus connectivity integrates with aircraft avionics databuses, and the IEC 60730 Class B Safety Library supports DO-178-derived safety workflows for non-primary flight displays.
Recommandé
Récapitulatif des produits recommandés
Données de référence d'ingénierie pour PIC32MZ2064DAK169T-I/HF — comparaison, recommandations de conception et informations de conformité.
Guide de sélection
Comparaison avec les alternatives
| Paramètre | Ce produit | PIC32MZ2064DAK169-I/HF | PIC32MZ1064DAK169-I/HF |
|---|---|---|---|
| Package | 169-LFBGA (11x11 mm) | 169-LFBGA (11x11 mm) - same | 169-LFBGA (11x11 mm) - same |
| Brand | Microchip Technology | Microchip Technology - same | Microchip Technology - same |
| Core | MIPS32 microAptiv @ 200 MHz | MIPS32 microAptiv @ 200 MHz - same | MIPS32 microAptiv @ 200 MHz - same |
| Flash | 2 MB | 2 MB - same | 1 MB (-50%) |
| SRAM | 640 KB | 640 KB - same | 640 KB - same |
| Graphics Controller | Integrated (2D GPU) | Integrated (2D GPU) - same | Integrated (2D GPU) - same |
| Operating Temperature | -40C to +85C (Industrial) | -40C to +85C (Industrial) - same | -40C to +85C (Industrial) - same |
| Packaging | Tape & Reel ('-T') | Tray (no '-T') | Tray (no '-T') |
| Family Compatibility | PIC32MZ DAK 169-LFBGA | Same family, 169-LFBGA | Same family, 169-LFBGA |
Principaux différenciateurs
- On-chip DDR2 controller with hardware GPU (vs PIC32MZ2064DAK169-I/HF)
- Highest-density Flash in PIC32MZ DA family (vs PIC32MZ1064DAK169-I/HF)
- Class B Safety Library + AEC-Q100 Grade 1 in single device (vs STM32F769NIH6)
Notes de conception
The PIC32MZ2064DAK169T-I/HF requires multiple supply rails: VDD (core 1.8-3.3V), VDDR (DDR2 I/O 1.8V), VDDIO (digital I/O), AVDD/AVSS (analog), and VUSB (USB 3.3V). Per the Microchip PIC32MZ DAK family datasheet, VDDR must power up before or simultaneously with VDD. Recommended decoupling: 100 nF + 4.7 uF ceramic on every VDD pin, plus 10 uF bulk near the IC. Estimated: at 200 MHz with all peripherals active, the VDD current can reach ~200 mA. A 3.3V LDO with at least 500 mA capacity is recommended upstream.
The 169-LFBGA package has a 0.8 mm ball pitch. Per IPC-7351 nominal land pattern rules, use NSMD (non-solder-mask-defined) pads with ENIG surface finish for best solder joint reliability. Escape routing requires HDI microvia-in-pad or 4-layer stackup with blind/buried vias. Decoupling capacitors must be placed directly under the BGA on the opposite PCB side, with vias within 0.5 mm of the pad edge. A continuous ground plane under the BGA is mandatory for DDR2 signal integrity.
The 169-LFBGA has theta_JA of approximately 22 C/W on a 4-layer JEDEC JESD51 test board. Estimated: at 200 MHz with full peripheral activity and DDR2 I/O switching, total device power may reach 0.7-1.0 W, yielding a ~22 C junction temperature rise above ambient. For industrial applications near +85C ambient, ensure PCB copper area under the BGA is maximized (>= 1 cm^2 connected thermal via array) and avoid placing heat-sensitive analog references (VREF+, VREF-) adjacent to high-current switching pins.
Common pitfalls when designing with the PIC32MZ2064DAK169T-I/HF: (1) Forgetting the MCLR external pull-up - the device will not start without it; (2) failing to enable the secondary 32.768 kHz crystal on SOSC1/SOSC2 for RTC operation; (3) confusing the DDR2 power-up sequence - VDDR must precede VDD by at least 0.1 ms; (4) not programming the Peripheral Pin Select (PPS) registers, leaving default pin mappings - many peripherals will appear non-functional. Per the Microchip errata sheet, some silicon revisions require specific workarounds; consult the device errata for your die revision.
Informations de conformité
RoHS and REACH compliant per Microchip product page. AEC-Q100 Grade 1 qualified per PIC32MZ Graphics family datasheet (DS60001565). Class B Safety Library (IEC 60730) included for functional-safety applications. Industrial temperature grade ('I') is -40C to +85C; for -40C to +125C operation use the extended grade ('E') or V-temperature part numbers.