EP610JI-30 vs EP610LI-35 Сравнение
Подробное сравнение бок о бок EP610JI-30 от Altera и EP610LI-35 от Altera. Сравните ключевые характеристики, электрические параметры, упаковку, статус жизненного цикла, цены и наличие, чтобы выбрать лучший компонент для ваших требований.
Сравнение характеристик
| Параметр | EP610JI-30 | EP610LI-35 |
|---|---|---|
| Бренд | Altera | Altera |
| Категория | FPGA & CPLD | FPGA & CPLD |
| Статус жизненного цикла | NRND | Obsolete |
| Наличие | In Stock | In Stock |
| Цена за единицу (USD) | $9,40 | $10,50 |
| Family | Altera Classic EPLD (EP610) | Classic EPLD |
| Device Type | UV Erasable Programmable Logic Device (EPLD) | — |
| Macrocells | 16 | — |
| Propagation Delay (tpd) | 30 ns (max) | — |
| Pipelined Data Rate | Up to 100 MHz | Up to 100 MHz |
| Product Terms | 160 | 160 |
| Dedicated Inputs | 4 | 4 |
| I/O Pins | 16 | — |
| External Clocks | 2 | — |
| Напряжение питания | 5 V (single supply) | 5 V |
| Process Technology | CMOS | CMOS |
| Корпус | CQCC28 (windowed ceramic JLCC, J-bend) | 28-pin PLCC (windowed ceramic, 'LI') |
| Package Code | JLCC-28 / CQCC28 | — |
| Erasure Method | Ultraviolet (UV) via top window | — |
| Programming | Altera Logic Programmer compatible | — |
| Рабочая температура | -40C to +85C (industrial, per EP610 family suffix convention) | — |
| Тип монтажа | Surface Mount (JLCC) | Surface Mount |
| Статус RoHS | [DATA_NEEDED: RoHS status - vintage ceramic package, likely non-RoHS] | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Series | — | EP610 |
| Number of Macrocells | — | 16 |
| Usable Gates | — | 300 |
| Number of I/O Pins | — | 16 |
| Total Inputs | — | 20 |
| External Clock Inputs | — | 2 |
| Maximum Propagation Delay | — | 35 ns (tpd) |
| Maximum Operating Frequency | — | 28.6 MHz (fmax) |
| Architecture | — | PAL-type (AND-OR array) |
| Диапазон рабочих температур | — | [DATA_NEEDED: military/industrial operating temperature range] |
| Programming Technology | — | UV-erasable (EPROM) |