Altera

EPF10K30ETC144-2N - 30K Gates FLEX 10KE FPGA | Intel / Altera

Артикул: EPF10K30ETC144-2N ✗ Снят с производства

В наличии Отправка в течение 1–3 рабочих дней

2.375 V to 2.625 V Vdss 144-LQFP (TQFP-144) Package 200 MHz Speed

От $14.25 USD / шт.

MOQ: 1 |

Цена обновлена: 2026-09-11

Оптовые цены

Кол-во	Цена за ед.	Итого
1	$28.5	$28,50
10	$24.75	$247,50
100	$20.1	$2.010,00
500	$16.8	$8.400,00
1.000	$14.25	$14.250,00

ℹ️ Все цены указаны в USD

Открыть datasheet (PDF) Смотреть аналоги

Количество

EPF10K30ETC144-2N Обзор

The Intel (formerly Altera) EPF10K30ETC144-2N is a 30,000-gate FLEX 10KE series Field-Programmable Gate Array (FPGA) with 1,728 logic cells and 24,576 RAM bits, housed in a 144-pin LQFP (TQFP) package. It operates from a 2.5 V core supply (2.375 V to 2.625 V) and supports 102 user I/O pins with a 0.6 ns propagation delay at an internal frequency up to 200 MHz.

A Field-Programmable Gate Array (FPGA) is a type of programmable logic device (PLD) that allows engineers to implement custom digital circuits through a matrix of configurable logic blocks (CLBs), embedded memory, and programmable interconnects. FPGAs sit hierarchically above standard logic ICs and below application-specific integrated circuits (ASICs) in the broader semiconductor landscape, offering ASIC-class density with field-reprogrammability and shorter time-to-market than mask-programmed alternatives. The FLEX 10KE family specifically introduced an embedded array block architecture that combined logic, RAM, and ROM in a single die for system-on-a-programmable-chip (SOPC) integration.

Key features of the EPF10K30ETC144-2N include 102 user I/Os, an embedded JTAG boundary-scan test interface compliant with IEEE 1149.1, configurable I/O standards, and built-in clock-management resources. The 144-LQFP package is pin-compatible with other members of the FLEX 10KE family in the same footprint, enabling straightforward density upgrades within the family. The '2' speed grade denotes the standard performance tier, and the 'N' suffix indicates a lead-free / Pb-free terminal finish.

Architecturally, the EPF10K30ETC144-2N combines a fine-grained logic element fabric with coarser embedded array blocks (EABs) that can be configured as RAM, ROM, or multiplier functions. This hybrid architecture was the first to deliver System-on-a-Programmable-Chip (SOPC) integration in a PLD, allowing designers to place CPU cores, memory, and peripherals alongside custom logic on a single programmable die.

Typical applications for this FPGA include industrial control logic, glue-logic integration around legacy microprocessors, custom interface bridging (parallel-to-serial conversion), low-volume ASIC prototyping, and embedded DSP pre/post-processing. It is also used in telecommunications line-card glue logic and test-and-measurement fixture controllers.

When designing with the EPF10K30ETC144-2N, ensure your toolchain targets the FLEX 10KE device family and that the 144-LQFP PCB land pattern matches the 20 mm x 20 mm, 0.5 mm pitch package outline. Because the part is now in lifecycle decline, plan for last-time-buy acquisition if you are maintaining a long-lifecycle product.

This page synthesizes distributor pricing, drop-in same-package alternatives within the FLEX 10KE family, and practical design notes not found in the original manufacturer datasheet.

Аналоги без доработки для EPF10K30ETC144-2N — тот же корпус, pin-to-pin совместимость. Компоненты в других корпусах, требующие переработки PCB, исключены.

Варианты в этой серии

Модели той же серии, совместимые без доработки с EPF10K30ETC144-2N (тот же форм-фактор и посадочное место) — отличается по Operating Temperature, Package, Process Technology, Family, Configuration Method.

EPF10K30ATC144-1N

Intel

Operating Temperature: 0 C to 70 C (Commercial)

Package: 144-LQFP (TQFP-144)

Family: FLEX 10KA