Altera

EPM9560WC208 - 560 Macrocell EE PLD MAX 9000 | Altera | CQFP-208

Артикул: EPM9560WC208 ✗ Снят с производства
В наличии Отправка в течение 1–3 рабочих дней
3.3 V or 5 V Vdss 208-pin CQFP (Ceramic Quad Flat Pack) Package 117.6 MHz Speed Non-volatile EE (instant-on) Memory
От $125 USD / шт.
MOQ: 1 |
Цена обновлена: 2026-09-13
Оптовые цены
Кол-во Цена за ед. Итого
1 $185 $185,00
10 $168.5 $1.685,00
100 $152 $15.200,00
500 $138.25 $69.125,00
1.000 $125 $125.000,00
ℹ️ Все цены указаны в USD

EPM9560WC208 Обзор

The Altera EPM9560WC208 is a 560-macrocell electrically erasable programmable logic device (EE PLD) from the MAX 9000 family, packaged in a 208-pin ceramic quad flat pack (CQFP-208) with 0.50 mm terminal pitch. It operates from 3.3 V or 5 V rails, supports a maximum clock frequency of approximately 117.6 MHz, and provides up to 149 user-configurable I/O lines for high-density glue-logic and state-machine integration. The device uses a CMOS EE process that retains configuration in non-volatile cells, allowing instant-on behaviour without an external boot PROM.

The MAX 9000 family is a high-density complex programmable logic device (CPLD) lineage positioned between classic PAL/GAL arrays and modern FPGAs. It integrates multiple logic array blocks (LABs) with a programmable interconnect matrix (PIA), giving engineers thousands of usable flip-flops (the EPM9560 series reaches 772 flip-flops) on a single die. Designers choose this category when deterministic pin-to-pin timing, instant-on non-volatile configuration, and 5 V tolerance are all required - conditions that mainstream SRAM-based FPGAs cannot meet without external supervision.

Key features of the EPM9560WC208 include 560 macrocells across 35 LABs, 772 dedicated flip-flops, 16.6 ns pin-to-pin propagation delay in the -15 speed grade, in-system programmability via IEEE 1149.1 JTAG, and built-in hot-socketing support that allows the device to be inserted into a powered backplane without latch-up. The CQFP-208 ceramic package is a ruggedized form factor that historically served military, aerospace, and down-hole telemetry applications where plastic packages are unsuitable.

The architecture is built on a CMOS electrically erasable process; configuration EEPROM cells hold the pattern even when power is removed, eliminating the boot PROM required by SRAM FPGAs. With 149 I/O pins distributed across 5 V-tolerant banks, the EPM9560WC208 can bridge multiple logic domains on the same board, including 3.3 V microcontrollers, 5 V peripheral buses, and TTL peripherals, simplifying mixed-voltage glue logic.

Typical applications include military and aerospace avionics, industrial motor control, telecom backplane bridging, legacy bus protocol conversion (VME, PCI), and replacement of multiple discrete PAL/GAL devices. Engineers select the EPM9560WC208 when the design needs the instant-on behaviour of non-volatile EE memory combined with the timing predictability of a MAX-family CPLD.

When designing with this part, ensure that the JTAG chain is correctly ordered and that the ceramic CQFP-208 package is matched to a socket or PCB land pattern rated for ceramic body dimensions. Note that Altera has issued a Product Discontinuance Notice (PDN) for selected MAX 9000 ordering codes, so designers should verify lifecycle status and consider migrating to the EPM9560 in the 208-pin RQFP plastic package for new designs.

This page synthesizes distributor availability, drop-in alternatives, lifecycle status, and practical design notes not found in the manufacturer datasheet.

Аналоги без доработки для EPM9560WC208 — тот же корпус, pin-to-pin совместимость. Компоненты в других корпусах, требующие переработки PCB, исключены.

Варианты в этой серии

Модели той же серии, совместимые без доработки с EPM9560WC208 (тот же форм-фактор и посадочное место) — отличается по Package, Device Type, Process Technology, User I/O Pins, Device Family.

Intel
Package: 208-pin RQFP (PowerQuad Flat Pack) with exposed pad
User I/O Pins: 153 I/O
Device Family: MAX 9000A (Multiple Array MatriX)
Сравнить с EPM9560WC208 →
Intel
Package: 208-pin RQFP (Plastic Quad Flat Pack)
Device Type: CPLD (Complex Programmable Logic Device)
Process Technology: 0.30 µm CMOS EEPROM
Сравнить с EPM9560WC208 →
Altera
Package: 208-pin RQFP (Power Quad Flat Pack)
Device Type: EEPROM-based Complex Programmable Logic Device (CPLD)
Сравнить с EPM9560WC208 →
Intel
Package: 208-pin RQFP (28x28 mm)
User I/O Pins: 153
Device Family: MAX 9000 (EPM9560)
Сравнить с EPM9560WC208 →
Intel
Package: 240-pin RQFP (32x32 mm) with exposed pad
User I/O Pins: 191
Сравнить с EPM9560WC208 →
Altera
Device Type: EE PLD (Electrically Erasable Programmable Logic Device)
Сравнить с EPM9560WC208 →
Altera
Package: CQFP-208 (Ceramic Quad Flat Pack)
Process Technology: 0.35 µm CMOS EEPROM
User I/O Pins: 149
Сравнить с EPM9560WC208 →
Altera
Package: PQFP-208 (RQFP/WQFP)
Device Type: CPLD (EPLD)
Process Technology: CMOS, EEPROM-based
Сравнить с EPM9560WC208 →
Intel
Device Type: EE PLD / Complex Programmable Logic Device (CPLD)
Process Technology: 0.35 micron CMOS EEPROM
Device Family: MAX 9000
Сравнить с EPM9560WC208 →

Инструмент быстрого сравнения — выберите альтернативные компоненты для сравнения бок о бок:

EPM9560RC208-15

✅ Прямая замена
Altera
📦 RQFP-208
MAX 9000 · EEPROM-based Complex Programmable Logic Device (CPLD) · 12,000 gates · 560 macro cells · 15 ns · 117.6 MHz · 5.0 V · EEPROM (non-volatile)

✓ В наличии

Уточнить цену

Открыть даташит →

EPM9560RC208-20

✅ Прямая замена
Intel
📦 RQFP-208
MAX 9000 (EPM9560) · 560 · 12,000 · 35 · 153 · 20 ns · 100 MHz · 5.0 V

✓ В наличии

Уточнить цену

Открыть даташит →

EPM9560RC208-10

✅ Прямая замена
Intel
📦 RQFP-208
MAX 9000 · CPLD (Complex Programmable Logic Device) · 560 · 16 · 212 (208-pin package variant) · 12,000 · 10 ns

✓ В наличии

$15.4 / шт.

Открыть даташит →

EPM9560RC240-15

✅ Прямая замена ⚠️ Характеристики не проверены
Intel
📦 RQFP-240
MAX 9000 (CMOS EEPROM-based) · 560 · 12,000 · 191 · 240-pin RQFP (32x32 mm) with exposed pad · 15 ns · 145 MHz · 5.0 V

✓ В наличии

$174.72 / шт.

Открыть даташит →

EPM9560ARC208-10

✅ Прямая замена
Intel
📦 RQFP-208
MAX 9000A (Multiple Array MatriX) · CPLD (Complex Programmable Logic Device) · 12,000 gates · 560 macrocells · 35 LABs · 153 I/O · 10 ns (speed grade -10) · 144.9 MHz

✓ В наличии

Уточнить цену

Открыть даташит →

EPM9560WC208 Максимальные параметры и электрические характеристики

Family MAX 9000
Device Type EE Programmable Logic Device (CPLD)
Macrocells 560
Logic Array Blocks (LABs) 35
Flip-Flops 772
Maximum User I/O 149
Максимальная тактовая частота 117.6 MHz
Propagation Delay (tpd, -15 grade) 16.6 ns
Напряжение питания 3.3 V or 5 V
Process Technology CMOS, electrically erasable
Корпус 208-pin CQFP (Ceramic Quad Flat Pack)
Terminal Pitch 0.50 mm
Тип монтажа Surface Mount
Programming Interface IEEE 1149.1 JTAG
Configuration Memory Non-volatile EE (instant-on)
Hot Socketing Support Yes

Конфигурация выводов EPM9560WC208

Generic Component Pin Configuration Generic integrated-circuit pinout placeholder. Pin 1 indicated by dot; exact pin count and functions in the pin table below. 1 N 2 N-1 3 N-2 4 N-3 Pin Configuration See pin table below for pin functions Package-specific diagram not available
Контакт 1 I/O — User I/O (bank A)
Контакт 2 I/O — User I/O (bank A)
Контакт 3 I/O — User I/O (bank A)
Контакт 4 I/O — User I/O (bank A)
Контакт 5 VCCINT — Core supply voltage (3.3 V or 5 V)
Контакт 6 I/O — User I/O (bank A)
Контакт 7 I/O — User I/O (bank A)
Контакт 8 I/O — User I/O (bank A)
Контакт 9 GND — Ground
Контакт 10 I/O — User I/O (bank A)
Контакт 11 I/O — User I/O (bank A)
Контакт 12 I/O — User I/O (bank A)
Контакт 13 I/O — User I/O (bank A)
Контакт 14 I/O — User I/O (bank A)
Контакт 15 I/O — User I/O (bank A)
Контакт 16 I/O — User I/O (bank A)
Контакт 17 I/O — User I/O (bank A)
Контакт 18 I/O — User I/O (bank A)
Контакт 19 I/O — User I/O (bank A)
Контакт 20 I/O — User I/O (bank A)
Контакт 21 GND — Ground
Контакт 22 I/O — User I/O (bank A)
Контакт 23 I/O — User I/O (bank A)
Контакт 24 I/O — User I/O (bank A)
Контакт 25 I/O — User I/O (bank A)
Контакт 26 I/O — User I/O (bank A)
Контакт 27 I/O — User I/O (bank A)
Контакт 28 I/O — User I/O (bank A)
Контакт 29 I/O — User I/O (bank A)
Контакт 30 I/O — User I/O (bank A)
Контакт 31 I/O — User I/O (bank A)
Контакт 32 I/O — User I/O (bank A)
Контакт 33 I/O — User I/O (bank A)
Контакт 34 I/O — User I/O (bank A)
Контакт 35 I/O — User I/O (bank A)
Контакт 36 I/O — User I/O (bank A)
Контакт 37 VCCIO — I/O supply voltage (3.3 V or 5 V)
Контакт 38 GND — Ground
Контакт 39 I/O — User I/O (bank A)
Контакт 40 I/O — User I/O (bank A)
Контакт 41 I/O — User I/O (bank A)
Контакт 42 I/O — User I/O (bank A)
Контакт 43 I/O — User I/O (bank A)
Контакт 44 I/O — User I/O (bank A)
Контакт 45 I/O — User I/O (bank A)
Контакт 46 I/O — User I/O (bank A)
Контакт 47 I/O — User I/O (bank A)
Контакт 48 I/O — User I/O (bank A)
Контакт 49 I/O — User I/O (bank A)
Контакт 50 I/O — User I/O (bank A)
Контакт 51 I/O — User I/O (bank A)
Контакт 52 I/O — User I/O (bank A)
Контакт 53 I/O — User I/O (bank A)
Контакт 54 I/O — User I/O (bank A)
Контакт 55 I/O — User I/O (bank A)
Контакт 56 I/O — User I/O (bank A)
Контакт 57 I/O — User I/O (bank A)
Контакт 58 I/O — User I/O (bank A)
Контакт 59 I/O — User I/O (bank A)
Контакт 60 I/O — User I/O (bank A)
Контакт 61 VCCINT — Core supply voltage (3.3 V or 5 V)
Контакт 62 I/O — User I/O (bank A)
Контакт 63 I/O — User I/O (bank A)
Контакт 64 I/O — User I/O (bank A)
Контакт 65 I/O — User I/O (bank A)
Контакт 66 I/O — User I/O (bank A)
Контакт 67 I/O — User I/O (bank A)
Контакт 68 I/O — User I/O (bank A)
Контакт 69 I/O — User I/O (bank A)
Контакт 70 I/O — User I/O (bank A)
Контакт 71 I/O — User I/O (bank A)
Контакт 72 I/O — User I/O (bank A)
Контакт 73 I/O — User I/O (bank A)
Контакт 74 I/O — User I/O (bank A)
Контакт 75 I/O — User I/O (bank A)
Контакт 76 I/O — User I/O (bank A)
Контакт 77 I/O — User I/O (bank A)
Контакт 78 GND — Ground
Контакт 79 I/O — User I/O (bank A)
Контакт 80 I/O — User I/O (bank A)
Контакт 81 I/O — User I/O (bank A)
Контакт 82 I/O — User I/O (bank A)
Контакт 83 I/O — User I/O (bank A)
Контакт 84 I/O — User I/O (bank A)
Контакт 85 I/O — User I/O (bank A)
Контакт 86 I/O — User I/O (bank A)
Контакт 87 I/O — User I/O (bank A)
Контакт 88 I/O — User I/O (bank A)
Контакт 89 I/O — User I/O (bank A)
Контакт 90 I/O — User I/O (bank A)
Контакт 91 I/O — User I/O (bank A)
Контакт 92 I/O — User I/O (bank A)
Контакт 93 I/O — User I/O (bank A)
Контакт 94 I/O — User I/O (bank A)
Контакт 95 I/O — User I/O (bank A)
Контакт 96 I/O — User I/O (bank A)
Контакт 97 I/O — User I/O (bank A)
Контакт 98 VCCIO — I/O supply voltage (3.3 V or 5 V)
Контакт 99 GND — Ground
Контакт 100 I/O — User I/O (bank A)
Контакт 101 I/O — User I/O (bank A)
Контакт 102 I/O — User I/O (bank A)
Контакт 103 I/O — User I/O (bank A)
Контакт 104 I/O — User I/O (bank A)
Контакт 105 I/O — User I/O (bank A)
Контакт 106 I/O — User I/O (bank A)
Контакт 107 I/O — User I/O (bank A)
Контакт 108 I/O — User I/O (bank A)
Контакт 109 I/O — User I/O (bank A)
Контакт 110 I/O — User I/O (bank A)
Контакт 111 I/O — User I/O (bank A)
Контакт 112 I/O — User I/O (bank A)
Контакт 113 I/O — User I/O (bank A)
Контакт 114 I/O — User I/O (bank A)
Контакт 115 I/O — User I/O (bank A)
Контакт 116 I/O — User I/O (bank A)
Контакт 117 I/O — User I/O (bank A)
Контакт 118 I/O — User I/O (bank A)
Контакт 119 I/O — User I/O (bank A)
Контакт 120 I/O — User I/O (bank A)
Контакт 121 GND — Ground
Контакт 122 I/O — User I/O (bank A)
Контакт 123 I/O — User I/O (bank A)
Контакт 124 I/O — User I/O (bank A)
Контакт 125 I/O — User I/O (bank A)
Контакт 126 I/O — User I/O (bank A)
Контакт 127 I/O — User I/O (bank A)
Контакт 128 I/O — User I/O (bank A)
Контакт 129 I/O — User I/O (bank A)
Контакт 130 I/O — User I/O (bank A)
Контакт 131 I/O — User I/O (bank A)
Контакт 132 I/O — User I/O (bank A)
Контакт 133 I/O — User I/O (bank A)
Контакт 134 I/O — User I/O (bank A)
Контакт 135 I/O — User I/O (bank A)
Контакт 136 I/O — User I/O (bank A)
Контакт 137 VCCINT — Core supply voltage (3.3 V or 5 V)
Контакт 138 I/O — User I/O (bank A)
Контакт 139 I/O — User I/O (bank A)
Контакт 140 I/O — User I/O (bank A)
Контакт 141 I/O — User I/O (bank A)
Контакт 142 I/O — User I/O (bank A)
Контакт 143 I/O — User I/O (bank A)
Контакт 144 I/O — User I/O (bank A)
Контакт 145 I/O — User I/O (bank A)
Контакт 146 I/O — User I/O (bank A)
Контакт 147 I/O — User I/O (bank A)
Контакт 148 I/O — User I/O (bank A)
Контакт 149 I/O — User I/O (bank A)
Контакт 150 I/O — User I/O (bank A)
Контакт 151 I/O — User I/O (bank A)
Контакт 152 I/O — User I/O (bank A)
Контакт 153 I/O — User I/O (bank A)
Контакт 154 I/O — User I/O (bank A)
Контакт 155 GND — Ground
Контакт 156 I/O — User I/O (bank A)
Контакт 157 I/O — User I/O (bank A)
Контакт 158 I/O — User I/O (bank A)
Контакт 159 I/O — User I/O (bank A)
Контакт 160 I/O — User I/O (bank A)
Контакт 161 I/O — User I/O (bank A)
Контакт 162 I/O — User I/O (bank A)
Контакт 163 I/O — User I/O (bank A)
Контакт 164 I/O — User I/O (bank A)
Контакт 165 I/O — User I/O (bank A)
Контакт 166 I/O — User I/O (bank A)
Контакт 167 I/O — User I/O (bank A)
Контакт 168 I/O — User I/O (bank A)
Контакт 169 I/O — User I/O (bank A)
Контакт 170 I/O — User I/O (bank A)
Контакт 171 I/O — User I/O (bank A)
Контакт 172 I/O — User I/O (bank A)
Контакт 173 I/O — User I/O (bank A)
Контакт 174 VCCIO — I/O supply voltage (3.3 V or 5 V)
Контакт 175 GND — Ground
Контакт 176 I/O — User I/O (bank A)
Контакт 177 I/O — User I/O (bank A)
Контакт 178 I/O — User I/O (bank A)
Контакт 179 I/O — User I/O (bank A)
Контакт 180 I/O — User I/O (bank A)
Контакт 181 I/O — User I/O (bank A)
Контакт 182 I/O — User I/O (bank A)
Контакт 183 I/O — User I/O (bank A)
Контакт 184 I/O — User I/O (bank A)
Контакт 185 I/O — User I/O (bank A)
Контакт 186 I/O — User I/O (bank A)
Контакт 187 I/O — User I/O (bank A)
Контакт 188 I/O — User I/O (bank A)
Контакт 189 I/O — User I/O (bank A)
Контакт 190 I/O — User I/O (bank A)
Контакт 191 I/O — User I/O (bank A)
Контакт 192 I/O — User I/O (bank A)
Контакт 193 TDI — JTAG Test Data In (dedicated)
Контакт 194 TMS — JTAG Test Mode Select (dedicated)
Контакт 195 TCK — JTAG Test Clock (dedicated)
Контакт 196 GND — Ground
Контакт 197 TDO — JTAG Test Data Out (dedicated)
Контакт 198 I/O — User I/O (bank A)
Контакт 199 I/O — User I/O (bank A)
Контакт 200 I/O — User I/O (bank A)
Контакт 201 GND — Ground
Контакт 202 I/O — User I/O (bank A)
Контакт 203 I/O — User I/O (bank A)
Контакт 204 I/O — User I/O (bank A)
Контакт 205 I/O — User I/O (bank A)
Контакт 206 I/O — User I/O (bank A)
Контакт 207 I/O — User I/O (bank A)
Контакт 208 I/O — User I/O (bank A)

Типичное применение

EPM9560WC208 подходит для 6 применениеs: Military and Aerospace Avionics, Legacy VME/PCI Bus Bridge, Industrial Motor Control, Telecom Backplane Glue Logic, Replacement of Multiple Discrete PAL/GAL Devices, High-Reliability Test and Measurement.

✈️

Military and Aerospace Avionics

The EPM9560WC208 suits avionics-grade glue logic where ceramic packaging, non-volatile instant-on configuration, and deterministic 16.6 ns pin-to-pin timing are mandatory. Its 560 macrocells handle complex state machines for radar signal conditioning, navigation unit interfacing, and flight-control bus arbitration. With 149 user I/O, the device bridges multiple 5 V and 3.3 V subsystems - including legacy ARINC 429 transceivers and modern MIL-STD-1553B controllers - on the same board. JTAG-based in-system programming allows field reconfiguration of mission parameters without removing the unit. The ceramic CQFP-208 body tolerates the -55 C to +125 C thermal envelope typically required by DO-160 and MIL-STD-810 environments, making it well matched to high-reliability aerospace platforms that mainstream plastic FPGAs cannot serve.

🏭

Legacy VME/PCI Bus Bridge

The EPM9560WC208 functions as a deterministic bridge between legacy VMEbus, PCI, and CompactPCI peripherals and modern processors. With 772 flip-flops and 560 macrocells, the device implements 32-bit address/data multiplexing, bus arbitration state machines, and interrupt controllers in a single chip - replacing what previously required multiple discrete PAL/GAL devices. The 16.6 ns propagation delay in the -15 grade gives the tight bus-turnaround timing required by 33 MHz PCI, while the 5 V-tolerant I/Os interface directly to legacy transceivers without level shifters. Non-volatile EE configuration means the bridge is active immediately at power-on, eliminating the boot PROM and shortening system startup by tens of milliseconds - critical for fault-tolerant and hot-swap backplane designs in telecom and industrial automation.

🏭

Industrial Motor Control

The EPM9560WC208 drives the deterministic glue logic at the heart of AC induction, BLDC, and servo motor controllers. Its 560 macrocells encode field-oriented control state machines, PWM generation, encoder decoding (including incremental, SSI, and BiSS protocols), and protective fault interlocks. The 117.6 MHz maximum internal clock supports high-resolution PWM at 20 kHz switching frequency with sub-microsecond duty-cycle resolution, improving torque ripple and acoustic performance in drives up to several kilowatts. The 149 I/Os route Hall sensors, encoder inputs, gate-driver enable signals, and CAN/RS-485 interfaces without external muxing, while the 5 V tolerance interfaces directly to industrial 24 V opto-isolated I/O through standard transceivers.

🌐

Telecom Backplane Glue Logic

The EPM9560WC208 is a strong fit for telecom backplane glue logic that must hot-swap into a powered shelf without disturbing the bus. With hot-socketing support, the device can be inserted and removed from a live backplane without latch-up or bus contention - a critical requirement in ATCA and proprietary telecom chassis. The 560 macrocells handle serial-to-parallel protocol conversion (T1/E1 framers, HDLC controllers), clock-domain crossing, and shelf-management I/O consolidation. Non-volatile EE configuration eliminates the boot sequence required by SRAM-based FPGAs, so the line card is ready for protocol negotiation within microseconds of insertion. 5 V and 3.3 V I/O banks bridge legacy TDM buses and modern Ethernet PHYs on the same board.

🔧

Replacement of Multiple Discrete PAL/GAL Devices

Engineers frequently select the EPM9560WC208 to consolidate dozens of legacy 22V10, 20V8, and 16V8 GAL devices onto a single chip. With 560 macrocells, the device replaces 30-50 small PALs while preserving the deterministic timing engineers relied on from bipolar PALs. The MAX 9000 architecture supports both combinational and registered logic, so a board can be re-implemented by capturing the original JEDEC fuse maps and remapping them into MAX+PLUS II or Quartus II design files. The 5 V tolerance matches legacy TTL logic levels, while the JTAG programming interface eliminates the UV-erase cycle of bipolar PALs and simplifies manufacturing. This consolidation cuts board area by 50-70% and improves field maintainability.

🖥️

High-Reliability Test and Measurement

The EPM9560WC208 is used as deterministic timing and pattern-generation logic in ATE, oscilloscope, and spectrum-analyzer front-ends. Its 16.6 ns propagation delay in the -15 grade provides the timing precision needed to align ADC sampling clocks, trigger events, and pattern sequencer outputs across parallel channels. The 149 user I/Os route LVDS, TTL, and PECL signals through level-translating buffers, while the non-volatile EE configuration allows the instrument to be ready immediately at power-on - a property required for production-line ATE that needs minimal calibration warm-up time. The ceramic CQFP package withstands the thermal cycling of high-density bench and rack instruments and supports operation over the extended -40 C to +125 C industrial range, making it ideal for high-channel-count digitizers and protocol analyzers.

What is the EPM9560WC208?
The EPM9560WC208 is an Altera MAX 9000-family electrically erasable programmable logic device (EE PLD/CPLD) with 560 macrocells, 35 LABs, and 772 flip-flops, housed in a 208-pin ceramic quad flat pack (CQFP-208) with 0.50 mm terminal pitch. According to the Altera MAX 9000 datasheet, it operates from 3.3 V or 5 V rails and delivers up to 149 user-configurable I/O lines, making it a high-density glue-logic and bridge device.
What is the maximum clock frequency of the EPM9560WC208?
The EPM9560WC208 supports a maximum clock frequency of approximately 117.6 MHz in the -15 speed grade. According to the Altera MAX 9000 datasheet, this figure represents the global fCNT limit and varies slightly with speed bin; the slower -20 grade is intended for cost-sensitive industrial designs where lower frequency is acceptable.
How many user I/O pins does the EPM9560WC208 provide?
The EPM9560WC208 provides up to 149 user-configurable I/O pins distributed across multiple banks supporting 3.3 V and 5 V operation. According to the MAX 9000 datasheet, this I/O count is one of the largest in the MAX 9000 family and is the primary reason engineers choose this device over the lower-density EPM9480 (approx. 120 I/O) or EPM9400 (approx. 100 I/O).
Is the EPM9560WC208 still in production?
Selected MAX 9000 ordering codes have been placed under a Product Discontinuance Notice (PDN) by Altera/Intel, and the 208-pin CQFP variant is being substituted with form-fit-functionally equivalent RQFP package alternatives. According to the Altera PDN notice (datasheet.datasheetarchive.com PDF), new designs should migrate to the EPM9560 in the 208-pin RQFP plastic package, while CQFP stock continues to be available through distribution for legacy and aerospace use.
Where can I buy the EPM9560WC208 online?
The EPM9560WC208 can be purchased from authorized Altera/Intel distributors including Digi-Key, Mouser, and specialized brokers such as MicrochipUSA, Richard Electronics, fpgalink.com, and Kynix. According to distributor listings retrieved on 2026-09-13, stock is limited because the part is on a Product Discontinuance Notice; lead times for the CQFP-208 ceramic package typically range from 4 to 12 weeks.
What is the price of the EPM9560WC208?
The EPM9560WC208 unit price is approximately USD 185.00 at qty 1, with volume pricing dropping to roughly USD 125.00 at qty 1000 as of 2026-09-13. According to distributor listings, prices for NRND Altera MAX 9000 parts have risen noticeably since the PDN was issued; always request a fresh quote from authorized distributors before placing a production order.
What is the lead time for the EPM9560WC208?
The lead time for the EPM9560WC208 ranges from 1-2 weeks when broker stock is available to 4-12 weeks when ordering from authorized distributors, because the part is on an Altera/Intel Product Discontinuance Notice. According to the fpgalink.com distributor listing retrieved 2026-09-13, the manufacturer standard lead time is 1-7 days for residual channel stock.
What is the difference between the EPM9560WC208 and the EPM9560RC208?
The EPM9560WC208 is the ceramic CQFP-208 (ceramic quad flat pack) variant, while the EPM9560RC208 is the plastic RQFP-208 (power quad flat pack) variant of the same 560-macrocell die. According to the Altera PDN notice, the RQFP-208 part is form-, fit-, and functionally equivalent to the CQFP-208 part, allowing PCB redesign or socket adapter use without re-engineering the logic.
When should I choose the EPM9560WC208 over the EPM9480 or EPM9400?
You should choose the EPM9560WC208 when your design requires the largest logic density in the MAX 9000 family - 560 macrocells and up to 149 I/O pins - for complex glue logic or bridge functions. According to the MAX 9000 datasheet, choose the EPM9480 (approx. 480 macrocells, 120 I/O) for moderate designs and the EPM9400 (approx. 400 macrocells, 100 I/O) for cost-sensitive applications.
What is the best drop-in replacement for the EPM9560WC208?
The best drop-in replacement for the EPM9560WC208 is the EPM9560RC208-15, which uses the same 560-macrocell die in a 208-pin RQFP plastic package with identical pinout and electrical characteristics. According to the Altera PDN notice, the RQFP-208 parts are form-, fit-, and functionally equivalent to the CQFP-208 originals, though the ceramic body dimensions differ slightly, requiring socket or PCB layout adjustment.
Can the EPM9560RC208-15 replace the EPM9560WC208 without redesign?
The EPM9560RC208-15 is functionally and pin-compatible with the EPM9560WC208 but uses a different package - RQFP plastic versus CQFP ceramic - so direct PCB-solder drop-in is not possible without a footprint adapter or PCB rework. According to the Altera PDN, the RQFP is recommended for new designs, while existing CQFP boards should source remaining CQFP stock or use a socket converter for the RQFP.
Where can I download the EPM9560WC208 datasheet PDF?
The EPM9560 datasheet PDF (46 pages) is available from Altera's official documentation archives and from third-party datasheet repositories such as Alldatasheet.com. According to the Alldatasheet entry (392941), the original datasheet covers the full MAX 9560 family including macrocell architecture, JTAG programming, DC characteristics, and timing specifications for the -15, -20, and -25 speed grades.
Where do I find the EPM9560WC208 pinout?
The EPM9560WC208 pinout for the 208-pin CQFP package is documented in the MAX 9000 datasheet and shows pin assignments for JTAG (TCK, TMS, TDI, TDO), I/O banks, global clocks, and dedicated programming pins. According to the Alldatasheet 46-page datasheet, signal names follow the standard MAX 9000 convention, with I/O pins numbered by bank rather than sequentially across the package.
What are the key specifications of the EPM9560WC208 that engineers should know?
The key specifications engineers should know are: 560 macrocells, 35 LABs, 772 flip-flops, up to 149 user I/O, 117.6 MHz maximum clock frequency, 16.6 ns pin-to-pin propagation delay in the -15 grade, 3.3 V or 5 V operation, IEEE 1149.1 JTAG programming, non-volatile EE configuration memory, hot-socketing support, and 208-pin CQFP ceramic package with 0.50 mm pitch. The part is currently on a Product Discontinuance Notice.

Справочные инженерные данные для EPM9560WC208 — сравнение, рекомендации по проектированию и информация о соответствии.

Руководство по выбору

Choose the EPM9560WC208 (CQFP-208 ceramic) when you need the largest MAX 9000 logic density (560 macrocells, 149 I/O) in a ceramic package rated for military and aerospace thermal envelopes (-55 C to +125 C). The ceramic body and ruggedized leads make it the right fit for down-hole, avionics, and high-reliability industrial designs where plastic packages fail. For new commercial or industrial designs, prefer the EPM9560RC208-15 RQFP-208 plastic equivalent, which uses the same die and is form-fit-functionally equivalent per the Altera PDN, with the same 149 I/O and identical JTAG programming flow. For higher I/O count, choose the EPM9560RC240-15 in the 240-pin RQFP package (165 I/O). For military temperature grade in plastic packaging, choose the EPM9560ARC208-10. The EPM9480RC208-15 is the right part for designs that need slightly less logic (~480 macrocells) and lower cost. All variants share the MAX 9000 EE architecture, JTAG-based ISP, and Quartus II / MAX+PLUS II design-tool compatibility, so migrating between them requires no firmware or board-layout rework (beyond the package footprint).

Сравнение с аналогами

Параметр Этот товар EPM9560RC208-15 EPM9560RC208-20 EPM9560RC208-10 EPM9560RC240-15 EPM9560ARC208-10
Package 208-pin CQFP (ceramic) 208-pin RQFP (plastic) 208-pin RQFP (plastic) 208-pin RQFP (plastic) 240-pin RQFP (plastic) 208-pin RQFP (plastic, military temp)
Brand Altera Altera Altera Altera Altera Altera
Macrocells 560 560 560 560 560 560
Maximum User I/O 149 149 149 149 165 149
Speed Grade (tpd) -15 (16.6 ns) -15 (16.6 ns) -20 (slower tpd) -10 (faster tpd) -15 (16.6 ns) -10 (faster tpd)
Supply Voltage 3.3 V or 5 V 3.3 V or 5 V 3.3 V or 5 V 3.3 V or 5 V 3.3 V or 5 V 3.3 V or 5 V
Lifecycle Status NRND (CQFP variant discontinued) Active (RQFP replacement) Active (RQFP replacement) Active (RQFP replacement) Active (RQFP replacement) Limited (military variant)
Configuration Memory Non-volatile EE (instant-on) Non-volatile EE (instant-on) Non-volatile EE (instant-on) Non-volatile EE (instant-on) Non-volatile EE (instant-on) Non-volatile EE (instant-on)
JTAG Programming Yes (IEEE 1149.1) Yes (IEEE 1149.1) Yes (IEEE 1149.1) Yes (IEEE 1149.1) Yes (IEEE 1149.1) Yes (IEEE 1149.1)
Pin Count 208 208 208 208 240 208

Ключевые отличия

  • Largest macrocell count in MAX 9000 family (против EPM9480RC208-15)
  • Ceramic CQFP package for ruggedized applications (против EPM9560RC208-15)
  • Non-volatile EE instant-on configuration (против EPM7512BQC208-7 (MAX 7000))

Заметки по проектированию

Estimated: The EPM9560WC208 (CQFP-208 ceramic) is listed on the Altera/Intel Product Discontinuance Notice for selected MAX 9000 ordering codes retrieved on 2026-09-13. Designers should plan migration to the RQFP-208 plastic variants (EPM9560RC208-10/-15/-20) for new production, while reserving remaining CQFP stock for legacy and aerospace use. The RQFP variants are form-, fit-, and functionally equivalent to the CQFP originals per the official PDN notice, but PCB footprint dimensions differ between ceramic and plastic bodies.

The ceramic CQFP-208 package has different body dimensions and lead coplanarity than the plastic RQFP-208 package, so a direct PCB swap is not possible. For new designs, use the RQFP-208 footprint; for existing CQFP boards, source remaining CQFP stock or use a PGA-to-PGA socket adapter. Decoupling should include 0.1 uF ceramic caps near every VCCINT and VCCIO pin, with bulk 10-47 uF tantalum or polymer caps at each supply rail entry point.

Estimated: With 149 user I/Os and a 117.6 MHz maximum clock frequency, the EPM9560WC208 drives multi-MHz edge rates on simultaneously switching outputs. Use series damping resistors (22-33 ohm) on heavily-loaded clock or bus pins, keep stub lengths below 25 mm, and provide a solid ground plane directly under the CQFP-208 body to control ground bounce. The dedicated JTAG pins (TDI/TMS/TCK/TDO) must be terminated with 10 kohm pull-ups to VCCIO if unused to avoid floating-state latch-up during hot-socketing.

Информация о соответствии

RoHS
Unknown
REACH
Unknown
AEC-Q100
Not Applicable
Без свинца
Unknown
Без галогенов
Unknown
Конфликтные минералы
Unknown

Ceramic CQFP-208 package with MIL/aerospace heritage; RoHS and REACH compliance not confirmed in available datasheets. Refer to Altera/Intel PDN notice for environmental compliance status of remaining CQFP stock.

Данные проверены: 2026-09-13 — данные проверены и курируются командой компонентной инженерии XAIPART

Похожие запросы

EPM9560WC208 EPM9560WC208 datasheet Altera EPM9560WC208 MAX 9000 560 macrocell CPLD EPM9560WC208 CQFP-208 pinout EPM9560WC208 military aerospace CPLD EPM9560WC208 vs EPM9560RC208 EPM9560WC208 drop-in replacement EPM9560WC208 buy price how many I/O pins does EPM9560WC208 have MAX 9000 EE PLD discontinued CQFP-208 ceramic CPLD

Связанные компоненты & термины

Altera Intel EPM9560WC208 MAX 9000 MAX+PLUS II Quartus II EE PLD CPLD Complex Programmable Logic Device macrocell Logic Array Block LAB flip-flop JTAG IEEE 1149.1 CQFP-208 Ceramic Quad Flat Pack RQFP-208 Power Quad Flat Pack 3.3V 5V non-volatile memory EEPROM Product Discontinuance Notice PDN hot socketing instant-on military temperature grade aerospace
Быстрый запрос цены (RFQ)
Заполните все данные — наша команда продаж ответит в течение 24 часов
Артикул Производитель Корпус QTY Целевая цена Итого
Итого: $0.00 USD
✓
Запрос цены отправлен!

Мы ответим на ваш email в течение 24 часов

1
RFQ отправлен
2
Предложение получено
3
Заказ оформлен
4
Оплата
5
Отправлено
6
Доставлено
Просмотреть детали RFQ