EP2AGZ300FF35C3G vs EP2AGZ300FF35C4N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2AGZ300FF35C3G sa pamamagitan ng Intel at EP2AGZ300FF35C4N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2AGZ300FF35C3G | EP2AGZ300FF35C4N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Obsolete |
| Series | Arria II GZ | Arria II GZ |
| Logic Elements | 300,000 | 298,000 |
| Adaptive Logic Modules (ALMs) | 119,088 | — |
| Embedded Memory | 17,133 Kbit | — |
| DSP Blocks | 16-bit x 18-bit x 18-bit multipliers, integer/fractional modes | [DATA_NEEDED: number of DSP blocks] |
| Transceivers | 16 channels, up to 6.375 Gbps | Multi-gigabit transceivers integrated |
| Hard PCIe Controllers | Up to 12 (Gen2 endpoint/root-port) | — |
| User I/Os | 1,288 | — |
| I/O Banks | 12 | — |
| Process Technology | 40 nm TSMC | 40 nm |
| Packhaging | FCBGA-1152 (35 mm) | — |
| Package Family | BGA (Flip-Chip) | — |
| Temperature Grade | Commercial (0 C to 85 C junction) | — |
| Speed Grade | 3 (mid-performance) | — |
| Configuration Method | Quartus II/Prime, JTAG, Passive Serial, Fast Passive Parallel | — |
| Hard Memory Controller | DDR3 up to 800 MHz, DDR2, QDR II+ | — |
| Tindminan RoHS | Compliant | Compliant (per Besenchips / DigiKey listing) |
| Logic Array Blocks (LABs) | — | 11,920 |
| Embedded Memory (bits) | — | 18,854,912 (~17.9 Mbit) |
| User I/O Count | — | 554 |
| Number of I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Core Voltage | — | 0.9 V |
| Package Type | — | 1152-BBGA, FCBGA (flip-chip) |
| Terminal Form | — | Ball |
| Package Code (JEDEC) | — | HBGA |
| Operating Temperature Grade | — | Commercial (C4 = 0C to +85C) |
| Configuration Memory | — | SRAM-based (volatile, requires boot device) |
| PLLs | — | [DATA_NEEDED: PLL count] |
| Lead-Free Status | — | Lead free (per Besenchips listing) |
| Uri ng Pagpapasok | — | Surface Mount |
| Maximum Operating Frequency | — | 500 MHz |