EP3C40F780C7 vs EP3C40F780C8 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3C40F780C7 sa pamamagitan ng Intel at EP3C40F780C8 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP3C40F780C7 | EP3C40F780C8 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Aktibo |
| Family | Cyclone III | Cyclone III |
| Logic Elements (LE) | 39,600 | — |
| Number of Logic Cells | 39,600 | — |
| Total Memory Bits | 1,161,216 bits | 1,161,216 bits (1134 Kbit) |
| Embedded 18x18 Multipliers | 126 | 126 |
| Number of PLLs | 4 | — |
| User I/O Count | 535 | — |
| I/O Banks | 8 | — |
| Packhaging | 780-ball FBGA (F780) | 780-ball FBGA (FineLine BGA) |
| Package Dimensions | 29 x 29 mm | — |
| Ball Pitch | 1.0 mm | — |
| Core Voltage (VCCINT) | 1.2 V | — |
| I/O Voltage (VCCIO) | 1.2 V to 3.3 V | — |
| Temperature na Operasyon | 0C to +85C (Commercial) | — |
| Speed Grade | C7 | C8 (commercial, -40C to +85C operating range per 'C' designator family convention) |
| Process Technology | 60 nm TSMC low-power CMOS | 65 nm low-power CMOS |
| Configuration | Active Serial / Passive Parallel (JTAG) | Serial (AS) / Parallel (AP) / JTAG |
| Level ng MSL | 3 (168 hours) | — |
| Tindminan RoHS | Compliant | Compliant |
| Series | — | EP3C40 |
| Logic Elements | — | 39,600 |
| Embedded Memory | — | M9K blocks, 486 Kbit total (per family datasheet) |
| General Purpose PLLs | — | 4 |
| Global Clock Networks | — | 20 |
| Maximum User I/O Pins | — | 535 |
| User I/O Banks | — | [DATA_NEEDED: user I/O bank count] |
| Supported Memory Interfaces | — | DDR, DDR2, QDRII SRAM (via dedicated PHY) |
| Uri ng Pagpapasok | — | Surface Mount (BGA) |